Searched refs:getCommonSubClass (Results 1 – 16 of 16) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1277 return getCommonSubClass(&AMDGPU::VGPR_32RegClass, RC) != nullptr; in hasVGPRs()
1279 return getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) != nullptr; in hasVGPRs()
1281 return getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) != nullptr; in hasVGPRs()
1283 return getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) != nullptr; in hasVGPRs()
1285 return getCommonSubClass(&AMDGPU::VReg_160RegClass, RC) != nullptr; in hasVGPRs()
1287 return getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) != nullptr; in hasVGPRs()
1289 return getCommonSubClass(&AMDGPU::VReg_512RegClass, RC) != nullptr; in hasVGPRs()
1291 return getCommonSubClass(&AMDGPU::VReg_1024RegClass, RC) != nullptr; in hasVGPRs()
1293 return getCommonSubClass(&AMDGPU::VReg_1RegClass, RC) != nullptr; in hasVGPRs()
1306 return getCommonSubClass(&AMDGPU::AGPR_32RegClass, RC) != nullptr; in hasAGPRs()
[all …]
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| D | SIInstrInfo.cpp | 3850 if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC)) in legalizeOpWithMove()
4681 if (RI.getCommonSubClass(MRI.getRegClass(Rsrc->getReg()), in legalizeOperands()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LiveStacks.cpp | 70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
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| D | TargetRegisterInfo.cpp | 249 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
370 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
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| D | DetectDeadLanes.cpp | 190 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
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| D | MachineRegisterInfo.cpp | 75 MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
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| D | RegisterCoalescer.cpp | 488 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
1327 TRI->getCommonSubClass(DefRC, DstRC); in reMaterializeTrivialDef()
1380 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
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| D | MachineInstr.cpp | 913 CurRC = TRI->getCommonSubClass(CurRC, OpRC); in getRegClassConstraintEffect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 155 TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI), in getRegAllocationHints()
158 RC = TRI->getCommonSubClass(RC, in getRegAllocationHints()
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| D | SystemZInstrInfo.cpp | 547 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 684 getCommonSubClass(const TargetRegisterClass *A,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 142 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
214 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
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| D | DAGCombiner.cpp | 14697 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 770 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
803 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 505 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 2846 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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