/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 565 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 603 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues() 938 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() 939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() 991 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue() 1070 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() 1071 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue() 1090 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue() 1124 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue() 1188 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getT2AddrModeImm0_1020s4OpValue() [all …]
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D | ARMELFStreamer.cpp | 1349 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes() 1440 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP() 1459 unsigned Reg = MRI->getEncodingValue(RegList[i]); in emitRegSave()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 139 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction() 166 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction() 167 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction() 243 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
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D | R600RegisterInfo.cpp | 75 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 79 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
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D | GCNRegBankReassign.cpp | 291 Reg = TRI->getEncodingValue(Reg) / 2; in getPhysRegBank() 329 Reg = TRI->getEncodingValue(Reg) / 2; in getRegBankMask() 750 TRI->getEncodingValue(AMDGPU::SGPR_NULL) / 2 + 1); in runOnMachineFunction()
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D | SIRegisterInfo.h | 121 return getEncodingValue(Reg) & 0xff; in getHWRegIndex()
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D | SIInsertWaitcnts.cpp | 480 unsigned Reg = TRI->getEncodingValue(Op.getReg()); in getRegInterval() 626 setRegScore(TRI->getEncodingValue(DefMO.getReg()), EXP_CNT, in updateByEvent() 1487 RegisterEncoding.VGPR0 = TRI->getEncodingValue(AMDGPU::VGPR0); in runOnMachineFunction() 1490 RegisterEncoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0); in runOnMachineFunction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64ExternalSymbolizer.cpp | 100 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand() 129 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand() 130 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 374 RegEnc |= MRI.getEncodingValue(Reg); in getSDWASrcEncoding() 404 RegEnc |= MRI.getEncodingValue(Reg); in getSDWAVopcDstEncoding() 416 uint64_t Enc = MRI.getEncodingValue(Reg); in getAVOperandEncoding() 456 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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D | R600MCCodeEmitter.cpp | 168 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg() 177 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
D | BPFMCCodeEmitter.cpp | 91 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue() 164 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/MCTargetDesc/ |
D | MSP430MCCodeEmitter.cpp | 106 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue() 125 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getMemOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 220 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding() 243 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding() 274 return CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/ |
D | HexagonAsmParser.cpp | 1337 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction() 1380 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction() 1395 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction() 1411 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction() 1428 unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); in processInstruction() 1743 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction() 1767 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() 1784 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() 1801 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() 1821 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonAsmPrinter.cpp | 376 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 387 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 399 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 411 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction() 596 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsOptionRecord.cpp | 78 unsigned EncVal = MCRegInfo->getEncodingValue(SubReg); in SetPhysRegUsed()
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D | MipsMCCodeEmitter.cpp | 98 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch() 99 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch() 752 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 1062 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.h | 34 return getEncodingValue(i); in getSEHRegNum()
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D | AArch64FalkorHWPFFix.cpp | 661 unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0; in getTag() 662 unsigned Base = TRI->getEncodingValue(LI.BaseReg); in getTag() 670 Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg()); in getTag()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmParser.cpp | 2953 MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 || in processInstruction() 2954 MRI->getEncodingValue(Inst.getOperand(1).getReg()) < 8) in processInstruction() 2982 MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 || in processInstruction() 2983 MRI->getEncodingValue(Inst.getOperand(2).getReg()) < 8) in processInstruction() 3018 unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() 3019 unsigned Mask = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() 3021 MRI->getEncodingValue(Inst.getOperand(3 + X86::AddrIndexReg).getReg()); in validateInstruction() 3051 unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() 3053 MRI->getEncodingValue(Inst.getOperand(4 + X86::AddrIndexReg).getReg()); in validateInstruction() 3079 unsigned Src2Enc = MRI->getEncodingValue(Src2); in validateInstruction() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 674 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling() 716 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() 823 .addImm(getEncodingValue(SrcReg)) in lowerCRBitSpilling() 868 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/ |
D | SparcMCCodeEmitter.cpp | 128 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/ |
D | AVRMCCodeEmitter.cpp | 254 if (MO.isReg()) return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 4304 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4321 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4346 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList() 4352 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4386 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4401 MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { in parseRegisterList() 4412 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4418 EReg = MRI->getEncodingValue(++Reg); in parseRegisterList() 6755 unsigned RtEncoding = MRI->getEncodingValue(Op2.getReg()); in fixupGNULDRDAlias() 7134 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
D | RISCVMCCodeEmitter.cpp | 221 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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