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Searched refs:getKillRegState (Results 1 – 25 of 61) sorted by relevance

123

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRExpandPseudoInsts.cpp156 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expandArith()
157 .addReg(SrcLoReg, getKillRegState(SrcIsKill)); in expandArith()
161 .addReg(DstHiReg, getKillRegState(DstIsKill)) in expandArith()
162 .addReg(SrcHiReg, getKillRegState(SrcIsKill)); in expandArith()
189 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expandLogic()
190 .addReg(SrcLoReg, getKillRegState(SrcIsKill)); in expandLogic()
197 .addReg(DstHiReg, getKillRegState(DstIsKill)) in expandLogic()
198 .addReg(SrcHiReg, getKillRegState(SrcIsKill)); in expandLogic()
237 .addReg(DstLoReg, getKillRegState(SrcIsKill)) in expandLogicImm()
247 .addReg(DstHiReg, getKillRegState(SrcIsKill)) in expandLogicImm()
[all …]
DAVRInstrInfo.cpp53 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
62 .addReg(SrcLo, getKillRegState(KillSrc)); in copyPhysReg()
64 .addReg(SrcHi, getKillRegState(KillSrc)); in copyPhysReg()
78 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
155 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
DAVRRelaxMemOperations.cpp112 .addReg(Src.getReg(), getKillRegState(Src.isKill())); in relax()
116 .addReg(Ptr.getReg(), getKillRegState(Ptr.isKill())); in relax()
DAVRFrameLowering.cpp266 .addReg(Reg, getKillRegState(IsNotLiveIn)) in spillCalleeSavedRegisters()
335 getKillRegState(SrcIsKill)); in fixStackStores()
338 getKillRegState(SrcIsKill)); in fixStackStores()
341 .addReg(SrcReg, getKillRegState(SrcIsKill)); in fixStackStores()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.cpp323 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
331 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
335 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
346 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
363 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
367 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
411 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
414 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
417 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
420 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb1InstrInfo.cpp52 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
62 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
70 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
97 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
DMLxExpansionPass.cpp291 .addReg(Src1Reg, getKillRegState(Src1Kill)) in ExpandFPMLxInstruction()
292 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
302 MIB.addReg(TmpReg, getKillRegState(true)) in ExpandFPMLxInstruction()
303 .addReg(AccReg, getKillRegState(AccKill)); in ExpandFPMLxInstruction()
305 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true)); in ExpandFPMLxInstruction()
DARMLoadStoreOptimizer.cpp742 .addReg(Base, getKillRegState(KillOldBase)); in CreateLoadStoreMulti()
745 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
755 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
761 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
766 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
808 .addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
817 MIB.addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
823 MIB.addReg(R.first, getDefRegState(isDef) | getKillRegState(R.second)); in CreateLoadStoreMulti()
847 MIB.addReg(Regs[0].first, getKillRegState(Regs[0].second)) in CreateLoadStoreDouble()
848 .addReg(Regs[1].first, getKillRegState(Regs[1].second)); in CreateLoadStoreDouble()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp37 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
40 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
140 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrBuilder.h159 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset); in addRegOffset()
167 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) in addRegReg()
168 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); in addRegReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp2059 .addReg(Op0, getKillRegState(Op0IsKill)); in fastEmitInst_r()
2062 .addReg(Op0, getKillRegState(Op0IsKill)); in fastEmitInst_r()
2082 .addReg(Op0, getKillRegState(Op0IsKill)) in fastEmitInst_rr()
2083 .addReg(Op1, getKillRegState(Op1IsKill)); in fastEmitInst_rr()
2086 .addReg(Op0, getKillRegState(Op0IsKill)) in fastEmitInst_rr()
2087 .addReg(Op1, getKillRegState(Op1IsKill)); in fastEmitInst_rr()
2108 .addReg(Op0, getKillRegState(Op0IsKill)) in fastEmitInst_rrr()
2109 .addReg(Op1, getKillRegState(Op1IsKill)) in fastEmitInst_rrr()
2110 .addReg(Op2, getKillRegState(Op2IsKill)); in fastEmitInst_rrr()
2113 .addReg(Op0, getKillRegState(Op0IsKill)) in fastEmitInst_rrr()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreRegisterInfo.cpp77 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPImmInst()
113 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPConstInst()
147 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPImmInst()
190 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPConstInst()
DXCoreInstrInfo.cpp340 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
352 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
375 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.cpp54 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
58 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
103 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp278 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
363 .addReg(Src0, getKillRegState(KillSrc0), SubReg0) in transformInstruction()
364 .addReg(Src1, getKillRegState(KillSrc1), SubReg1); in transformInstruction()
DAArch64FastISel.cpp393 ResultReg).addReg(ZeroReg, getKillRegState(true)); in materializeInt()
430 .addReg(TmpReg, getKillRegState(true)); in materializeFP()
1347 .addReg(LHSReg, getKillRegState(LHSIsKill)) in emitAddSub_rr()
1348 .addReg(RHSReg, getKillRegState(RHSIsKill)); in emitAddSub_rr()
1391 .addReg(LHSReg, getKillRegState(LHSIsKill)) in emitAddSub_ri()
1434 .addReg(LHSReg, getKillRegState(LHSIsKill)) in emitAddSub_rs()
1435 .addReg(RHSReg, getKillRegState(RHSIsKill)) in emitAddSub_rs()
1479 .addReg(LHSReg, getKillRegState(LHSIsKill)) in emitAddSub_rx()
1480 .addReg(RHSReg, getKillRegState(RHSIsKill)) in emitAddSub_rx()
1538 .addReg(LHSReg, getKillRegState(LHSIsKill)); in emitFCmp()
[all …]
DAArch64InstrInfo.cpp2472 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyPhysRegTuple()
2496 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyGPRRegTuple()
2525 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
2528 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
2550 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
2555 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
2568 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
2578 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
2587 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
2598 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
[all …]
DAArch64ExpandPseudoInsts.cpp210 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP()
227 .addReg(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP()
291 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128()
299 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
307 .addUse(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
320 .addReg(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
DAArch64SIMDInstrOpt.cpp431 unsigned Src0IsKill = getKillRegState(MI.getOperand(1).isKill()); in optimizeVectElement()
433 unsigned Src1IsKill = getKillRegState(MI.getOperand(2).isKill()); in optimizeVectElement()
439 unsigned Src2IsKill = getKillRegState(MI.getOperand(3).isKill()); in optimizeVectElement()
639 StRegKill[i] = getKillRegState(DefiningMI->getOperand(2*i+1).isKill()); in processSeqRegInst()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp112 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
133 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4) in copyPhysReg()
139 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
180 MIB.addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
314 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStack()
739 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); in expandPseudoMTLoHi()
740 HiInst.addReg(SrcHi.getReg(), getKillRegState(SrcHi.isKill())); in expandPseudoMTLoHi()
750 unsigned KillSrc = getKillRegState(Src.isKill()); in expandCvtFPInt()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp79 unsigned Reg128Killed = getKillRegState(LowRegOp.isKill()); in splitMove()
263 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)); in emitGRX32Move()
268 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)) in emitGRX32Move()
781 .addReg(SrcReg, (getKillRegState(KillSrc) | RegState::Implicit)); in copyPhysReg()
802 .addReg(SrcRegHi, getKillRegState(KillSrc)) in copyPhysReg()
803 .addReg(SrcRegLo, getKillRegState(KillSrc)); in copyPhysReg()
818 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1); in copyPhysReg()
834 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
868 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
882 .addReg(SrcReg, getKillRegState(isKill)), in storeRegToStackSlot()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.cpp94 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
109 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
110 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp981 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
1027 .addReg(ScratchReg, getKillRegState(true)) in emitPrologue()
1035 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
1117 .addReg(TOCReg, getKillRegState(true)) in emitPrologue()
1610 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
1688 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
2250 getKillRegState(true)), in spillCalleeSavedRegisters()
2257 .addReg(Reg, getKillRegState(true)); in spillCalleeSavedRegisters()
2296 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
2300 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
[all …]
DPPCRegisterInfo.cpp568 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in lowerDynamicAlloc()
576 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
593 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in lowerDynamicAlloc()
601 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
663 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); in lowerCRSpilling()
813 RegState::Implicit | getKillRegState(MI.getOperand(0).isKill())); in lowerCRBitSpilling()
905 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); in lowerVRSAVESpilling()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonNewValueJump.cpp694 .addReg(cmpReg1, getKillRegState(MO1IsKill)) in runOnMachineFunction()
695 .addReg(cmpOp2, getKillRegState(MO2IsKill)) in runOnMachineFunction()
700 .addReg(cmpReg1, getKillRegState(MO1IsKill)) in runOnMachineFunction()

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