Searched refs:getKnownMinSize (Results 1 – 13 of 13) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | TypeSize.h | 132 uint64_t getKnownMinSize() const { in getKnownMinSize() function
200 return {(Size.getKnownMinSize() + Align - 1) / Align * Align, in alignTo()
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| D | MachineValueType.h | 843 return {(BaseSize.getKnownMinSize() + 7) / 8, BaseSize.isScalable()}; in getStoreSize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64StackOffset.h | 61 ScalableBytes += Other.first * ((int64_t)Size.getKnownMinSize() / 8);
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| D | AArch64ISelLowering.cpp | 10880 if (VT.getSizeInBits().getKnownMinSize() != AArch64::SVEBitsPerBlock) in LowerSVEIntrinsicEXT()
10884 unsigned ByteSize = VT.getSizeInBits().getKnownMinSize() / 8; in LowerSVEIntrinsicEXT()
12371 if (SrcVT.getSizeInBits().getKnownMinSize() > AArch64::SVEBitsPerBlock) in performST1ScatterCombine()
12436 if (RetVT.getSizeInBits().getKnownMinSize() > AArch64::SVEBitsPerBlock) in performLD1GatherCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 316 return {(BaseSize.getKnownMinSize() + 7) / 8, BaseSize.isScalable()}; in getStoreSize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | DataLayout.h | 456 return { (BaseSize.getKnownMinSize() + 7) / 8, BaseSize.isScalable() }; in getTypeStoreSize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 148 MF->getDataLayout().getTypeAllocSize(Ty).getKnownMinSize(); in set()
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| D | SelectionDAGBuilder.cpp | 4349 VT.getStoreSize().getKnownMinSize(), in visitMaskedStore()
4478 VT.getStoreSize().getKnownMinSize(), in visitMaskedScatter()
4551 VT.getStoreSize().getKnownMinSize(), in visitMaskedLoad()
4606 VT.getStoreSize().getKnownMinSize(), in visitMaskedGather()
9294 j*Parts[j].getValueType().getStoreSize().getKnownMinSize()); in LowerCallTo()
9768 ArgNo, PartBase+i*RegisterVT.getStoreSize().getKnownMinSize()); in LowerArguments()
9781 PartBase += VT.getStoreSize().getKnownMinSize(); in LowerArguments()
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| D | LegalizeVectorTypes.cpp | 4772 unsigned WidenWidth = WidenVT.getSizeInBits().getKnownMinSize(); in FindMemType()
4815 unsigned MemVTWidth = MemVT.getSizeInBits().getKnownMinSize(); in FindMemType()
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| D | SelectionDAG.cpp | 8990 assert(memvt.getStoreSize().getKnownMinSize() <= MMO->getSize() && in MemSDNode()
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| D | DAGCombiner.cpp | 235 VT.getSizeInBits().getKnownMinSize() >= MaximumLegalStoreInBits) in DAGCombiner()
236 MaximumLegalStoreInBits = VT.getSizeInBits().getKnownMinSize(); in DAGCombiner()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | DataLayout.cpp | 751 return getAlignmentInfo(AlignType, getTypeSizeInBits(Ty).getKnownMinSize(), in getAlignment()
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| D | Instructions.cpp | 3042 if (SrcBits.getKnownMinSize() == 0 || DestBits.getKnownMinSize() == 0) in isBitCastable()
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