| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 190 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
197 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
204 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
212 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
219 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
226 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
233 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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| D | R600ControlFlowFinalizer.cpp | 310 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
319 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| D | SIRegisterInfo.cpp | 113 return getMatchingSuperReg(BaseReg, AMDGPU::sub0, &AMDGPU::SGPR_128RegClass); in reservedPrivateSegmentBufferReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 516 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function
518 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2513 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2515 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2539 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2541 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2701 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
2703 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg()
2718 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
2720 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
2735 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
2737 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
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| D | AArch64LoadStoreOptimizer.cpp | 1068 IsStoreXReg ? Register(TRI->getMatchingSuperReg( in promoteLoadFromStore()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 79 return tri.getMatchingSuperReg(CopiedPReg, sub, rc); in copyHint()
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| D | TwoAddressInstructionPass.cpp | 1566 assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB)) in processTiedPairs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 1241 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1260 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1275 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1373 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1391 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1404 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| D | A15SDOptimizer.cpp | 145 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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| D | ARMBaseInstrInfo.cpp | 1593 unsigned DstRegD = TRI->getMatchingSuperReg(DstRegS, ARM::ssub_0, in expandPostRAPseudo()
1595 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo()
4868 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); in getCorrespondingDRegAndLane()
4875 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); in getCorrespondingDRegAndLane()
5179 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, in getPartialRegUpdateClearance()
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| D | ARMExpandPseudoInsts.cpp | 496 unsigned DstRegPair = TRI->getMatchingSuperReg(SubReg, ARM::dsub_0, in ExpandVLD()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 87 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
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| D | SystemZInstrInfo.cpp | 795 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64), in copyPhysReg()
798 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64), in copyPhysReg()
809 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64), in copyPhysReg()
812 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64), in copyPhysReg()
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| D | SystemZRegisterInfo.cpp | 121 PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), in getRegAllocationHints()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 548 NewVdata = MRI.getMatchingSuperReg(Vdata0, AMDGPU::sub0, in convertMIMGInst()
565 NewVAddr0 = MRI.getMatchingSuperReg(VAddr0, AMDGPU::sub0, in convertMIMGInst()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 458 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 78 return MRI->getMatchingSuperReg(Reg, From, Class); in toDREG()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonCopyToCombine.cpp | 600 unsigned DoubleRegDest = TRI->getMatchingSuperReg(LoRegDef, SubLo, SuperRC); in combine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3003 DestReg = TRI->getMatchingSuperReg(DestReg, X86::sub_xmm, in copyPhysReg()
3005 SrcReg = TRI->getMatchingSuperReg(SrcReg, X86::sub_xmm, in copyPhysReg()
3018 DestReg = TRI->getMatchingSuperReg(DestReg, X86::sub_ymm, in copyPhysReg()
3020 SrcReg = TRI->getMatchingSuperReg(SrcReg, X86::sub_ymm, in copyPhysReg()
4029 DestReg = TRI->getMatchingSuperReg(DestReg, SubIdx, &X86::VR512RegClass); in expandNOVLXLoad()
4052 SrcReg = TRI->getMatchingSuperReg(SrcReg, SubIdx, &X86::VR512RegClass); in expandNOVLXStore()
4123 TRI->getMatchingSuperReg(SrcReg, X86::sub_xmm, &X86::VR512RegClass); in expandPostRAPseudo()
4143 TRI->getMatchingSuperReg(SrcReg, X86::sub_ymm, &X86::VR512RegClass); in expandPostRAPseudo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMInstPrinter.cpp | 272 NewReg = MCOperand::createReg(MRI.getMatchingSuperReg( in printInst()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64InstPrinter.cpp | 1294 Reg = MRI.getMatchingSuperReg(Reg, AArch64::dsub, &FPR128RC); in printVectorList()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 914 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg()
923 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 5654 Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube64, in tryParseGPRSeqPair()
5657 Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube32, in tryParseGPRSeqPair()
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