| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | LivePhysRegs.h | 59 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
69 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
81 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in addReg()
91 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in removeReg()
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| D | TargetRegisterInfo.h | 75 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs() function
197 return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs()); in getRawAllocationOrder()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CriticalAntiDepBreaker.cpp | 49 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), in CriticalAntiDepBreaker()
50 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} in CriticalAntiDepBreaker()
56 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in StartBlock()
119 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
273 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in ScanInstruction()
477 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
531 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); in BreakAntiDependencies()
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| D | RegUsageInfoCollector.cpp | 128 unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs()); in runOnMachineFunction()
155 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
182 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
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| D | RegisterClassInfo.cpp | 62 CalleeSavedAliases.assign(TRI->getNumRegs(), 0); in runOnMachineFunction()
96 unsigned NumRegs = RC->getNumRegs(); in compute()
191 unsigned NReserved = RC->getNumRegs() - getNumAllocatableRegs(RC); in computePSetLimit()
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| D | TargetFrameLoweringImpl.cpp | 66 CalleeSaves.resize(TRI.getNumRegs()); in getCalleeSaves()
84 SavedRegs.resize(TRI.getNumRegs()); in determineCalleeSaves()
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| D | MachineRegisterInfo.cpp | 48 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo()
78 if (NewRC->getNumRegs() < MinNumRegs) in constrainRegClass()
259 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) in verifyUseLists()
515 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
616 assert(Reg && (Reg < TRI->getNumRegs()) && in disableCalleeSavedRegister()
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| D | TargetRegisterInfo.cpp | 67 BitVector Checked(getNumRegs()); in checkAllSuperRegsMarked()
105 else if (Reg < TRI->getNumRegs()) { in printReg()
219 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
465 unsigned N = (getNumRegs()+31) / 32; in regmaskSubsetEqual()
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| D | ExecutionDomainFix.cpp | 420 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
444 AliasMap.resize(TRI->getNumRegs()); in runOnMachineFunction()
445 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i) in runOnMachineFunction()
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| D | AggressiveAntiDepBreaker.cpp | 154 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); in StartBlock()
210 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
526 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters()
800 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
807 BitVector RegAliases(TRI->getNumRegs()); in BreakAntiDependencies()
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| D | InterferenceCache.cpp | 47 if (PhysRegEntriesCount == TRI->getNumRegs()) return; in reinitPhysRegEntries()
49 PhysRegEntriesCount = TRI->getNumRegs(); in reinitPhysRegEntries()
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| D | RegisterUsageInfo.cpp | 95 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print()
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| D | RegUsageInfoPropagate.cpp | 68 ->getNumRegs()) in setRegMask()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | RDFRegisters.cpp | 30 RegInfos.resize(TRI.getNumRegs()); in PhysicalRegisterInfo()
32 BitVector BadRC(TRI.getNumRegs()); in PhysicalRegisterInfo()
87 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) { in PhysicalRegisterInfo()
108 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) { in getAliasSet()
199 unsigned NumRegs = TRI.getNumRegs(); in aliasMM()
334 BitVector Regs(PRI.getTRI().getNumRegs()); in makeRegRef()
341 BitVector AR(PRI.getTRI().getNumRegs()); in makeRegRef()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.cpp | 92 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCalleeSavedRegs()
157 unsigned RegMaskSize = MachineOperand::getRegMaskSize(getNumRegs()); in UpdateCustomCallPreservedMask()
160 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCallPreservedMask()
201 BitVector Reserved(getNumRegs()); in getReservedRegs()
208 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getReservedRegs()
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| D | AArch64Subtarget.cpp | 170 ReserveXRegister(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
171 CustomCallSavedXRegs(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 46 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); in getSubRegIndex()
120 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() in getCodeViewRegNum()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVRegisterInfo.cpp | 70 BitVector Reserved(getNumRegs()); in getReservedRegs()
73 for (size_t Reg = 0; Reg < getNumRegs(); Reg++) { in getReservedRegs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 346 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} in RegDefsUses()
377 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
413 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/ |
| D | RegisterFile.cpp | 28 RegisterMappings(mri.getNumRegs(), {WriteRef(), RegisterRenamingInfo()}), in RegisterFile()
29 ZeroRegisters(mri.getNumRegs(), false) {
476 for (unsigned I = 0, E = MRI.getNumRegs(); I < E; ++I) { in dump()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 228 BitVector Reserved(getNumRegs()); in getReservedRegs()
389 BitVector PhysClobbered(getNumRegs()); in shouldCoalesce()
405 if (PhysClobbered.count() > (NewRC->getNumRegs() - DemandedFreeGR128)) in shouldCoalesce()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 56 unsigned getNumRegs() const { return RegsSize; } in getNumRegs() function
61 assert(i < getNumRegs() && "Register number out of range!"); in getRegister()
484 unsigned getNumRegs() const { in getNumRegs() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXRegisterInfo.cpp | 108 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/ |
| D | VERegisterInfo.cpp | 50 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600RegisterInfo.cpp | 32 BitVector Reserved(getNumRegs()); in getReservedRegs()
|