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Searched refs:getPhysRegClass (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.h126 const TargetRegisterClass *getPhysRegClass(unsigned Reg) const;
143 RC = getPhysRegClass(Reg); in isSGPRReg()
DSIFixSGPRCopies.cpp176 : TRI.getPhysRegClass(SrcReg); in getCopyRegClasses()
183 : TRI.getPhysRegClass(DstReg); in getCopyRegClasses()
DSIRegisterInfo.cpp775 const TargetRegisterClass *RC = getPhysRegClass(SuperReg); in spillSGPR()
880 const TargetRegisterClass *RC = getPhysRegClass(SuperReg); in restoreSGPR()
1233 const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const { in getPhysRegClass() function in SIRegisterInfo
1684 return getPhysRegClass(Reg); in getRegClassForReg()
DSIWholeQuadMode.cpp398 TRI->hasVectorRegisters(TRI->getPhysRegClass(Reg))) { in scanInstructions()
864 : TRI->getPhysRegClass(Reg); in lowerCopyInstrs()
DGCNHazardRecognizer.cpp970 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegClass(MO.getReg()))) { in fixSMEMtoVectorWriteHazards()
1055 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegClass(MO.getReg()))) in fixVcmpxExecWARHazard()
DSIInstrInfo.cpp489 : RI.getPhysRegClass(Reg); in shouldClusterMemOps()
535 const TargetRegisterClass *RC = RI.getPhysRegClass(DestReg); in copyPhysReg()
700 if (!RI.isSGPRClass(RI.getPhysRegClass(SrcReg))) { in copyPhysReg()
705 Opcode = RI.hasVGPRs(RI.getPhysRegClass(SrcReg)) ? in copyPhysReg()
707 } else if (RI.hasVGPRs(RC) && RI.hasAGPRs(RI.getPhysRegClass(SrcReg))) { in copyPhysReg()
2450 RI.isSGPRClass(RI.getPhysRegClass(Src0->getReg())))) || in FoldImmediate()
2467 RI.isSGPRClass(RI.getPhysRegClass(Src1->getReg()))) || in FoldImmediate()
3826 return RI.getPhysRegClass(Reg); in getOpRegClass()
3931 : RI.getPhysRegClass(Reg); in isLegalRegOperand()
DAMDGPUISelDAGToDAG.cpp575 return TRI->getPhysRegClass(Reg); in getOperandRegClass()