| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.h | 50 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | MipsRegisterInfo.cpp | 67 MipsRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in MipsRegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 99 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | X86RegisterInfo.cpp | 260 X86RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in X86RegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.h | 118 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | AArch64RegisterInfo.cpp | 540 unsigned AArch64RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in AArch64RegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 149 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | ARMBaseRegisterInfo.cpp | 264 ARMBaseRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in ARMBaseRegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.h | 78 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | PPCRegisterInfo.cpp | 417 unsigned PPCRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in PPCRegisterInfo
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 244 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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| D | SIRegisterInfo.cpp | 1722 unsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function in SIRegisterInfo
1730 return AMDGPURegisterInfo::getRegPressureLimit(RC, MF); in getRegPressureLimit()
1741 return getRegPressureLimit(&AMDGPU::VGPR_32RegClass, in getRegPressureSetLimit()
1745 return getRegPressureLimit(&AMDGPU::SGPR_32RegClass, in getRegPressureSetLimit()
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| D | SIInstrInfo.cpp | 657 unsigned MaxVGPRs = RI.getRegPressureLimit(&AMDGPU::VGPR_32RegClass, in copyPhysReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 722 virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC, in getRegPressureLimit() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 60 RegLimit[RC->getID()] = TRI->getRegPressureLimit(RC, *IS->MF); in ResourcePriorityQueue()
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| D | ScheduleDAGRRList.cpp | 1768 RegLimit[RC->getID()] = tri->getRegPressureLimit(RC, MF); in RegReductionPQBase()
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