| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreMachineFunctionInfo.cpp | 43 LRSpillSlot = MFI.CreateFixedObject(TRI.getSpillSize(RC), 0, true); in createLRSpillSlot()
45 LRSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC), in createLRSpillSlot()
59 FPSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC), in createFPSpillSlot()
72 unsigned Size = TRI.getSpillSize(RC); in createEHSpillSlot()
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| D | XCoreFrameLowering.cpp | 584 unsigned Size = TRI.getSpillSize(RC); in processFunctionBeforeFrameFinalized()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsMachineFunction.cpp | 158 EhDataRegFI[I] = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC), in createEhDataRegsFI()
173 TRI.getSpillSize(RC), TRI.getSpillAlignment(RC), false); in createISRRegFI()
196 TRI.getSpillSize(*RC), TRI.getSpillAlignment(*RC), false); in getMoveF64ViaSpillFI()
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| D | MipsFrameLowering.cpp | 127 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); in estimateStackSize()
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| D | MipsSEFrameLowering.cpp | 897 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
914 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCInstrInfo.cpp | 309 assert(TRI->getSpillSize(*RC) == 4 && in storeRegToStackSlot()
336 assert(TRI->getSpillSize(*RC) == 4 && in loadRegFromStackSlot()
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| D | ARCFrameLowering.cpp | 445 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false); in processFunctionBeforeFrameFinalized()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | StackMaps.cpp | 163 Locs.emplace_back(Location::Register, TRI->getSpillSize(*RC), in parseOperand()
249 unsigned Size = TRI->getSpillSize(*TRI->getMinimalPhysRegClass(Reg)); in createLiveOutReg()
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| D | TargetInstrInfo.cpp | 385 Size = TRI->getSpillSize(*RC); in getStackSlotRange()
401 assert(TRI->getSpillSize(*RC) >= (Offset + Size) && "bad subregister range"); in getStackSlotRange()
404 Offset = TRI->getSpillSize(*RC) - (Offset + Size); in getStackSlotRange()
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| D | VirtRegMap.cpp | 94 unsigned Size = TRI->getSpillSize(*RC); in createSpillSlot()
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| D | RegisterScavenging.cpp | 468 unsigned NeedSize = TRI->getSpillSize(RC); in spill()
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| D | TargetLoweringBase.cpp | 1130 if (TRI->getSpillSize(*SuperRC) <= TRI->getSpillSize(*BestRC)) in findRepresentativeClass()
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| D | PrologEpilogInserter.cpp | 434 unsigned Size = RegInfo->getSpillSize(*RC); in assignCalleeSavedSpillSlots()
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| D | RegAllocFast.cpp | 257 unsigned Size = TRI->getSpillSize(RC); in getStackSpaceFor()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVExtract.cpp | 146 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Align, in runOnMachineFunction()
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| D | HexagonFrameLowering.cpp | 1551 int FI = MFI.CreateFixedSpillStackObject(TRI->getSpillSize(*RC), S->Offset); in assignCalleeSavedSpillSlots()
1563 unsigned Size = TRI->getSpillSize(*RC); in assignCalleeSavedSpillSlots()
1789 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandStoreVec2()
1841 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandLoadVec2()
2019 unsigned S = HRI.getSpillSize(*RC), A = HRI.getSpillAlignment(*RC); in determineCalleeSaves()
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| D | HexagonInstrInfo.cpp | 1080 unsigned VecOffset = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
1119 unsigned VecOffset = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
2701 unsigned VectorSize = TRI->getSpillSize(Hexagon::HvxVRRegClass); in isValidOffset()
4215 return HRI.getSpillSize(Hexagon::HvxVRRegClass); in getMemAccessSize()
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| D | HexagonPatternsHVX.td | 69 int32_t VecSize = HRI->getSpillSize(Hexagon::HvxVRRegClass);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SILowerSGPRSpills.cpp | 210 int JunkFI = MFI.CreateStackObject(TRI->getSpillSize(*RC), in spillCalleeSavedRegs()
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| D | SIFrameLowering.cpp | 966 TRI->getSpillSize(AMDGPU::SGPR_32RegClass), 0, false); in processFunctionBeforeFrameFinalized()
970 TRI->getSpillSize(AMDGPU::SGPR_32RegClass), in processFunctionBeforeFrameFinalized()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 277 unsigned getSpillSize(const TargetRegisterClass &RC) const { in getSpillSize() function
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| D | MachineInstr.h | 1489 Optional<unsigned> getSpillSize(const TargetInstrInfo *TII) const;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 411 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false); in processFunctionBeforeFrameFinalized()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZFrameLowering.cpp | 160 unsigned Size = TRI->getSpillSize(*RC); in assignCalleeSavedSpillSlots()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3066 switch (STI.getRegisterInfo()->getSpillSize(*RC)) { in getLoadStoreRegOpcode()
3248 assert(MF.getFrameInfo().getObjectSize(FrameIdx) >= TRI->getSpillSize(*RC) && in storeRegToStackSlot()
3250 unsigned Alignment = std::max<uint32_t>(TRI->getSpillSize(*RC), 16); in storeRegToStackSlot()
3265 unsigned Alignment = std::max<uint32_t>(TRI->getSpillSize(*RC), 16); in loadRegFromStackSlot()
5410 unsigned SpillSize = STI.getRegisterInfo()->getSpillSize(*RC); in getBroadcastOpcode()
5504 unsigned Alignment = std::max<uint32_t>(TRI.getSpillSize(*RC), 16); in unfoldMemoryOperand()
5581 unsigned Alignment = std::max<uint32_t>(TRI.getSpillSize(*DstRC), 16); in unfoldMemoryOperand()
5648 unsigned Alignment = std::max<uint32_t>(TRI.getSpillSize(*RC), 16); in unfoldMemoryOperand()
5714 unsigned Alignment = std::max<uint32_t>(TRI.getSpillSize(*RC), 16); in unfoldMemoryOperand()
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