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Searched refs:getSubRegFromChannel (Results 1 – 10 of 10) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ExpandSpecialInstrs.cpp222 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(Chan); in runOnMachineFunction()
227 unsigned SubRegIndex0 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[Chan]); in runOnMachineFunction()
228 unsigned SubRegIndex1 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[3 - Chan]); in runOnMachineFunction()
237 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(Chan); in runOnMachineFunction()
DAMDGPURegisterInfo.h31 static unsigned getSubRegFromChannel(unsigned Channel, unsigned NumRegs = 1);
DAMDGPURegisterInfo.cpp75 unsigned AMDGPURegisterInfo::getSubRegFromChannel(unsigned Channel, unsigned NumRegs) { in getSubRegFromChannel() function in AMDGPURegisterInfo
DSIShrinkInstructions.cpp427 Reg = TRI.getSubReg(Reg, TRI.getSubRegFromChannel(I)); in getSubRegForIndex()
430 Sub = TRI.getSubRegFromChannel(I + countTrailingZeros(LM.getAsInteger())); in getSubRegForIndex()
DR600ControlFlowFinalizer.cpp311 AMDGPURegisterInfo::getSubRegFromChannel(TRI->getHWRegChan(Reg)), in isCompatibleWithClause()
320 AMDGPURegisterInfo::getSubRegFromChannel(TRI->getHWRegChan(Reg)), in isCompatibleWithClause()
DR600InstrInfo.cpp80 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(I); in copyPhysReg()
DAMDGPUISelDAGToDAG.cpp710 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i); in SelectBuildVector()
720 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i); in SelectBuildVector()
DSIRegisterInfo.cpp689 : getSubReg(ValueReg, getSubRegFromChannel(i)); in buildSpillLoadStore()
DAMDGPUInstructionSelector.cpp600 unsigned SubReg = TRI.getSubRegFromChannel(Offset / 32, InsSize / 32); in selectG_INSERT()
DSIInstrInfo.cpp4248 .addReg(SrcReg, 0, RI.getSubRegFromChannel(i)); in readlaneVGPRToSGPR()
4257 MIB.addImm(RI.getSubRegFromChannel(i)); in readlaneVGPRToSGPR()