| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 85 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate()
109 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal()
148 if (auto MI = MRI.getUniqueVRegDef(NVPTX::VRFrame)) { in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 102 if (!MRI->getUniqueVRegDef(I->getReg())) in checkADDrr()
159 if (!MRI->getUniqueVRegDef(I->getReg())) in processCandidate()
189 if (MRI->getUniqueVRegDef(I->getReg())) in processDstReg()
257 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixupVectorISel.cpp | 96 MachineInstr *DefInst = MRI.getUniqueVRegDef(WOp->getReg()); in findSRegBaseAndIndex()
120 MachineInstr *MI = MRI.getUniqueVRegDef(IndexReg); in findSRegBaseAndIndex()
132 MI = MRI.getUniqueVRegDef(BaseReg); in findSRegBaseAndIndex()
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| D | SILowerControlFlow.cpp | 365 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak()
423 MachineInstr *Def = MRI.getUniqueVRegDef(CFMask); in emitEndCf()
452 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands()
494 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks()
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| D | SILowerI1Copies.cpp | 579 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in lowerPhis()
741 MI = MRI->getUniqueVRegDef(Reg); in isConstantLaneMask()
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| D | GCNNSAReassign.cpp | 198 const MachineInstr *Def = MRI->getUniqueVRegDef(Reg); in CheckNSA()
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| D | SILoadStoreOptimizer.cpp | 1663 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in extractConstOffset()
1686 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg()); in processBaseWithConstOffset()
1696 MachineInstr *BaseLoDef = MRI->getUniqueVRegDef(BaseLo.getReg()); in processBaseWithConstOffset()
1697 MachineInstr *BaseHiDef = MRI->getUniqueVRegDef(BaseHi.getReg()); in processBaseWithConstOffset()
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| D | SIOptimizeExecMaskingPreRA.cpp | 128 auto SaveExecInst = MRI.getUniqueVRegDef(SavedExec); in getOrExecSource()
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| D | R600OptimizeVectorRegisters.cpp | 63 const MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in isImplicitlyDef()
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| D | SIFoldOperands.cpp | 474 MachineInstr *Def = MRI.getUniqueVRegDef(UseReg); in getRegSeqInit()
482 for (MachineInstr *SubDef = MRI.getUniqueVRegDef(Sub->getReg()); in getRegSeqInit()
485 SubDef = MRI.getUniqueVRegDef(Sub->getReg())) { in getRegSeqInit()
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| D | GCNRegBankReassign.cpp | 427 const MachineInstr *Def = MRI->getUniqueVRegDef(Reg); in isReassignable()
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| D | SIShrinkInstructions.cpp | 82 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); in foldImmediates()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 85 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getWinAllocaAmount()
269 if (MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg)) in lower()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 679 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands()
681 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands()
691 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling()
692 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling()
868 Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genAlternativeCodeSequence()
872 Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genAlternativeCodeSequence()
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| D | ModuloSchedule.cpp | 1352 MachineInstr *Producer = MRI.getUniqueVRegDef(Reg); in remapUse()
1382 LoopProducer = MRI.getUniqueVRegDef(LoopReg); in remapUse()
1686 MachineInstr *Use = MRI.getUniqueVRegDef(MO.getReg()); in moveStageBetweenBlocks()
1787 MachineInstr *Use = MRI.getUniqueVRegDef(Reg); in peelPrologAndEpilogs()
1876 MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in getEquivalentRegisterIn()
1887 int RMIStage = getStage(MRI.getUniqueVRegDef(R)); in rewriteUsesOf()
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| D | MachineCombiner.cpp | 149 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| D | MachineRegisterInfo.cpp | 411 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(unsigned Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| D | MachineCSE.cpp | 647 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlockCSE()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 98 assert(MF.getRegInfo().getUniqueVRegDef(VReg)); in stackifyVReg()
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| D | WebAssemblyRegisterInfo.cpp | 96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 596 MachineInstr *BaseDef = MRI.getUniqueVRegDef(Base); in findPostIndexCandidate()
617 MachineInstr *OffsetDef = MRI.getUniqueVRegDef(Offset); in findPostIndexCandidate()
739 MachineInstr &AddrDef = *MRI.getUniqueVRegDef(MatchInfo.Addr); in applyCombineIndexedLoadStore()
1359 MachineInstr *Add2Def = MRI.getUniqueVRegDef(Add2); in matchPtrAddImmedChain()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CondBrTuning.cpp | 83 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| D | AArch64SIMDInstrOpt.cpp | 519 DefiningMI = MRI->getUniqueVRegDef(SeqReg); in optimizeLdStInterleave()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 287 MachineInstr *MI = MRI->getUniqueVRegDef(SrcReg); in optimizeCompareInstr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 601 MachineInstr *getUniqueVRegDef(unsigned Reg) const;
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