/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsBranchExpansion.cpp | 355 if (Br->hasDelaySlot()) { in replaceBranch() 514 bool hasDelaySlot = buildProperJumpMI(BalTgtMBB, Pos, DL); in expandToLongBranch() local 516 if (STI->isTargetNaCl() || !hasDelaySlot) { in expandToLongBranch() 521 if (hasDelaySlot) { in expandToLongBranch() 620 bool hasDelaySlot = buildProperJumpMI(BalTgtMBB, Pos, DL); in expandToLongBranch() local 622 if (!hasDelaySlot) { in expandToLongBranch()
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D | Mips32r6InstrInfo.td | 368 bit hasDelaySlot = 0; 420 bit hasDelaySlot = 1; 454 bit hasDelaySlot = 1; 465 bit hasDelaySlot = 1; 483 bit hasDelaySlot = 0; 506 bit hasDelaySlot = 1; 1105 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, hasDelaySlot = 1, 1119 let hasDelaySlot = 1;
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D | MipsInstrInfo.td | 1477 let hasDelaySlot = 1; 1487 let hasDelaySlot = 1; 1500 let hasDelaySlot = 1; 1510 let hasDelaySlot = 1; 1536 let hasDelaySlot = 1; 1549 let hasDelaySlot = 1; 1556 let isTerminator=1, isBarrier=1, hasDelaySlot = 1, isCTI = 1 in 1569 let isCall=1, hasDelaySlot=1, isCTI=1, Defs = [RA] in { 1593 let hasDelaySlot = 1; 1598 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, hasDelaySlot = 1, [all …]
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D | MicroMips32r6InstrInfo.td | 376 let hasDelaySlot = 0; 386 let hasDelaySlot = 0; 462 let hasDelaySlot = 0; 476 bit hasDelaySlot = 0; 496 let hasDelaySlot = 0; 506 let hasDelaySlot = 0; 1232 bit hasDelaySlot = 0; 1318 bit hasDelaySlot = 0; 1783 let isCall=1, hasDelaySlot=0, isCTI=1, Defs = [RA] in {
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D | MicroMipsInstrInfo.td | 204 let hasDelaySlot = 0; 426 let hasDelaySlot = 1; 435 let hasDelaySlot = 1; 455 let hasDelaySlot = 1; 480 let hasDelaySlot = 1; 485 let isCall = 1, hasDelaySlot = 1, Defs = [RA] in { 584 let hasDelaySlot = 1;
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D | Mips16InstrInfo.td | 742 let hasDelaySlot = 0; // not true, but we add the nop for now 748 let hasDelaySlot = 0; // not true, but we add the nop for now 763 let hasDelaySlot = 1; 1377 let isCall=1, hasDelaySlot=0 in 1385 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
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D | MipsDelaySlotFiller.cpp | 304 return MI->hasDelaySlot() && !MI->isBundledWithSucc(); in hasUnoccupiedSlot()
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D | Mips64r6InstrInfo.td | 115 bit hasDelaySlot = 1;
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D | MipsInstrFPU.td | 239 let hasDelaySlot = 1; 250 let hasDelaySlot = 1;
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D | MicroMipsDSPInstrInfo.td | 398 bit hasDelaySlot = 0;
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D | MipsDSPInstrInfo.td | 539 bit hasDelaySlot = 1;
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D | Mips64InstrInfo.td | 496 let hasDelaySlot = 1;
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D | MipsMSAInstrInfo.td | 1424 bit hasDelaySlot = 1;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 134 if (!MI->hasDelaySlot()) in runOnMachineBasicBlock() 214 I->hasDelaySlot() || I->isBundledWithSucc()) in findDelayInstr()
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D | SparcInstrInfo.td | 777 let hasDelaySlot = 1; 785 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 in { 815 } // let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 819 let isTerminator = 1, isBarrier = 1, hasDelaySlot = 1, isBranch =1, 844 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 in { 869 } // let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 883 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 in { 893 } // let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 904 hasDelaySlot = 1, isCall = 1 in { 932 let isTerminator = 1, hasDelaySlot = 1, isBarrier = 1, [all …]
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D | SparcInstr64Bit.td | 348 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 in
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/ |
D | VEInstrInfo.td | 186 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1 in 245 isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 358 bool hasDelaySlot() const { return Flags & (1ULL << MCID::DelaySlot); } in hasDelaySlot() function
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiDelaySlotFiller.cpp | 97 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock()
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D | LanaiInstrInfo.td | 678 let isBranch = 1, isBarrier = 1, isTerminator = 1, hasDelaySlot = 1 in { 725 let isCall = 1, hasDelaySlot = 1, isCodeGenOnly = 1, Uses = [SP], 731 let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1, 786 let isBranch = 1, isBarrier = 1, isTerminator = 1, hasDelaySlot = 1, 806 let isBranch = 1, isBarrier = 1, isTerminator = 1, hasDelaySlot = 1, Rs1 = 0,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.td | 228 let isBranch = 1, isTerminator = 1, hasDelaySlot=0 in { 505 let isBranch = 1, isTerminator = 1, hasDelaySlot=0, isBarrier = 1 in { 510 let isCall=1, hasDelaySlot=0, Uses = [R11], 542 let isReturn = 1, isTerminator = 1, hasDelaySlot=0, isBarrier = 1,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 790 bool hasDelaySlot(QueryType Type = AnyInBundle) const {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfDebug.cpp | 731 if (MI.hasDelaySlot()) in constructCallSiteEntryDIEs() 1698 if (SP->areAllCallsDescribed() && MI->isCall() && !MI->hasDelaySlot()) in beginInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 2306 MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder(); in processInstruction() 2646 if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder()) in expandJalWithRegs() 3577 if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder()) in expandUncondBranchMMPseudo()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | Target.td | 527 bit hasDelaySlot = 0; // Does this instruction have an delay slot?
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