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Searched refs:imm (Results 1 – 25 of 476) sorted by relevance

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/third_party/mesa3d/src/intel/compiler/
Dbrw_fs_combine_constants.cpp110 struct imm { struct
162 struct imm *imm; argument
167 static struct imm *
171 if (table->imm[i].size == size && in find_imm()
172 !memcmp(table->imm[i].bytes, data, size)) { in find_imm()
173 return &table->imm[i]; in find_imm()
179 static struct imm *
184 table->imm = reralloc(mem_ctx, table->imm, struct imm, table->size); in new_imm()
186 return &table->imm[table->len++]; in new_imm()
200 const struct imm *a = (const struct imm *)_a, in compare()
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Dbrw_reg.h638 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_DF); in brw_imm_df() local
639 imm.df = df; in brw_imm_df()
640 return imm; in brw_imm_df()
646 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UQ); in brw_imm_u64() local
647 imm.u64 = u64; in brw_imm_u64()
648 return imm; in brw_imm_u64()
654 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); in brw_imm_f() local
655 imm.f = f; in brw_imm_f()
656 return imm; in brw_imm_f()
663 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_Q); in brw_imm_q() local
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/third_party/pcre2/pcre2/src/sljit/
DsljitNativeRISCV_64.c27 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_r, sljit_sw imm, slj… in load_immediate() argument
33 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
34 return push_inst(compiler, ADDI | RD(dst_r) | RS1(TMP_ZERO) | IMM_I(imm)); in load_immediate()
36 if (imm <= 0x7fffffffl && imm >= S32_MIN) { in load_immediate()
37 if (imm > S32_MAX) { in load_immediate()
38 SLJIT_ASSERT((imm & 0x800) != 0); in load_immediate()
40 return push_inst(compiler, XORI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
43 if ((imm & 0x800) != 0) in load_immediate()
44 imm += 0x1000; in load_immediate()
46 FAIL_IF(push_inst(compiler, LUI | RD(dst_r) | (sljit_ins)(imm & ~0xfff))); in load_immediate()
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DsljitNativePPC_64.c42 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in load_immediate() argument
49 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
50 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
52 if (!(imm & ~0xffff)) in load_immediate()
53 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
55 if (imm <= 0x7fffffffl && imm >= -0x80000000l) { in load_immediate()
56 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
57 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
61 tmp = (sljit_uw)((imm >= 0) ? imm : ~imm); in load_immediate()
65 tmp = ((sljit_uw)imm << shift); in load_immediate()
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DsljitNativePPC_32.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in load_immediate() argument
31 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
34 if (!(imm & ~0xffff)) in load_immediate()
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
48 sljit_u32 imm; in emit_single_op() local
117 return push_inst(compiler, ADDIS | D(dst) | A(src1) | compiler->imm); in emit_single_op()
119 imm = compiler->imm; in emit_single_op()
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DsljitNativeARM_T2_32.c66 #define IMM3(imm) ((sljit_ins)imm << 6) argument
67 #define IMM8(imm) ((sljit_ins)imm) argument
85 #define IMM5(imm) \ argument
86 (COPY_BITS(imm, 2, 12, 3) | (((sljit_ins)imm & 0x3) << 6))
87 #define IMM12(imm) \ argument
88 (COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | ((sljit_ins)imm & 0xff))
237 …JIT_INLINE sljit_s32 emit_imm32_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm) in emit_imm32_const() argument
240 …| COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff))… in emit_imm32_const()
242 …| COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) … in emit_imm32_const()
515 static sljit_uw get_imm(sljit_uw imm) in get_imm() argument
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DsljitNativeMIPS_64.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_ar, sljit_sw imm) in load_immediate() argument
37 if (!(imm & ~0xffff)) in load_immediate()
38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
40 if (imm < 0 && imm >= SIMM_MIN) in load_immediate()
41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
43 if (imm <= 0x7fffffffl && imm >= -0x80000000l) { in load_immediate()
44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
45 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
49 uimm = (sljit_uw)imm; in load_immediate()
50 if (imm < 0) { in load_immediate()
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DsljitNativeRISCV_32.c27 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_r, sljit_sw imm, slj… in load_immediate() argument
32 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
33 return push_inst(compiler, ADDI | RD(dst_r) | RS1(TMP_ZERO) | IMM_I(imm)); in load_immediate()
35 if (imm & 0x800) in load_immediate()
36 imm += 0x1000; in load_immediate()
38 FAIL_IF(push_inst(compiler, LUI | RD(dst_r) | (sljit_ins)(imm & ~0xfff))); in load_immediate()
40 if ((imm & 0xfff) == 0) in load_immediate()
43 return push_inst(compiler, ADDI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
/third_party/node/deps/v8/src/wasm/
Dfunction-body-decoder-impl.h638 const BranchTableImmediate<validate>& imm) in BranchTableIterator() argument
640 start_(imm.start), in BranchTableIterator()
641 pc_(imm.table), in BranchTableIterator()
642 table_count_(imm.table_count) {} in BranchTableIterator()
912 F(S128Const, Simd128Immediate<validate>& imm, Value* result) \
917 F(GlobalGet, Value* result, const GlobalIndexImmediate<validate>& imm) \
918 F(StructNewWithRtt, const StructIndexImmediate<validate>& imm, \
920 F(StructNewDefault, const StructIndexImmediate<validate>& imm, \
922 F(ArrayInit, const ArrayIndexImmediate<validate>& imm, \
942 F(LocalGet, Value* result, const IndexImmediate<validate>& imm) \
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Dgraph-builder-interface.cc383 void S128Const(FullDecoder* decoder, const Simd128Immediate<validate>& imm, in S128Const() argument
385 result->node = builder_->Simd128Constant(imm.value); in S128Const()
403 const IndexImmediate<validate>& imm) { in LocalGet() argument
404 result->node = ssa_env_->locals[imm.index]; in LocalGet()
408 const IndexImmediate<validate>& imm) { in LocalSet() argument
409 ssa_env_->locals[imm.index] = value.node; in LocalSet()
413 const IndexImmediate<validate>& imm) { in LocalTee() argument
415 ssa_env_->locals[imm.index] = value.node; in LocalTee()
432 const GlobalIndexImmediate<validate>& imm) { in GlobalGet() argument
433 result->node = builder_->GlobalGet(imm.index); in GlobalGet()
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Dinit-expr-interface.cc41 Simd128Immediate<validate>& imm, in S128Const() argument
44 result->runtime_value = WasmValue(imm.value, kWasmS128); in S128Const()
103 const GlobalIndexImmediate<validate>& imm) { in GlobalGet() argument
105 const WasmGlobal& global = module_->globals[imm.index]; in GlobalGet()
121 FullDecoder* decoder, const StructIndexImmediate<validate>& imm, in StructNewWithRtt() argument
124 std::vector<WasmValue> field_values(imm.struct_type->field_count()); in StructNewWithRtt()
130 imm.struct_type, field_values.data(), in StructNewWithRtt()
132 ValueType::Ref(HeapType(imm.index), kNonNullable)); in StructNewWithRtt()
162 FullDecoder* decoder, const StructIndexImmediate<validate>& imm, in StructNewDefault() argument
165 std::vector<WasmValue> field_values(imm.struct_type->field_count()); in StructNewDefault()
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Dfunction-body-decoder.cc264 BlockTypeImmediate<Decoder::kNoValidation> imm(WasmFeatures::All(), &i, in PrintRawWasmCode() local
267 CHECK(decoder.Validate(i.pc() + 1, imm)); in PrintRawWasmCode()
268 for (uint32_t j = 0; j < imm.out_arity(); j++) { in PrintRawWasmCode()
269 os << " " << imm.out_type(j).name(); in PrintRawWasmCode()
279 BranchDepthImmediate<Decoder::kNoValidation> imm(&i, i.pc() + 1); in PrintRawWasmCode() local
280 os << " depth=" << imm.depth; in PrintRawWasmCode()
284 BranchDepthImmediate<Decoder::kNoValidation> imm(&i, i.pc() + 1); in PrintRawWasmCode() local
285 os << " depth=" << imm.depth; in PrintRawWasmCode()
289 BranchTableImmediate<Decoder::kNoValidation> imm(&i, i.pc() + 1); in PrintRawWasmCode() local
290 os << " entries=" << imm.table_count; in PrintRawWasmCode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td220 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SP:$rs1, opnd:$imm),
221 OpcodeStr, "$rd, ${imm}(${rs1})">;
226 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SP:$rs1, opnd:$imm),
227 OpcodeStr, "$rs2, ${imm}(${rs1})">;
232 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRC:$rs1, opnd:$imm),
233 OpcodeStr, "$rd, ${imm}(${rs1})">;
238 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2, GPRC:$rs1, opnd:$imm),
239 OpcodeStr, "$rs2, ${imm}(${rs1})">;
244 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
245 OpcodeStr, "$rs1, $imm"> {
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/third_party/vixl/src/aarch32/
Dinstructions-aarch32.cc605 ImmediateT32::ImmediateT32(uint32_t imm) { in ImmediateT32() argument
607 if ((imm & ~0xff) == 0) { in ImmediateT32()
608 SetEncodingValue(imm); in ImmediateT32()
611 if ((imm >> 16) == (imm & 0xffff)) { in ImmediateT32()
612 if ((imm & 0xff00) == 0) { in ImmediateT32()
614 SetEncodingValue((imm & 0xff) | (0x1 << 8)); in ImmediateT32()
617 if ((imm & 0xff) == 0) { in ImmediateT32()
619 SetEncodingValue(((imm >> 8) & 0xff) | (0x2 << 8)); in ImmediateT32()
622 if (((imm >> 8) & 0xff) == (imm & 0xff)) { in ImmediateT32()
624 SetEncodingValue((imm & 0xff) | (0x3 << 8)); in ImmediateT32()
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Dmacro-assembler-aarch32.cc225 uint32_t imm) { in HandleOutOfBoundsImmediate() argument
226 if (IsUintN(16, imm)) { in HandleOutOfBoundsImmediate()
228 mov(cond, tmp, imm & 0xffff); in HandleOutOfBoundsImmediate()
232 if (ImmediateT32::IsImmediateT32(~imm)) { in HandleOutOfBoundsImmediate()
234 mvn(cond, tmp, ~imm); in HandleOutOfBoundsImmediate()
238 if (ImmediateA32::IsImmediateA32(~imm)) { in HandleOutOfBoundsImmediate()
240 mvn(cond, tmp, ~imm); in HandleOutOfBoundsImmediate()
245 mov(cond, tmp, imm & 0xffff); in HandleOutOfBoundsImmediate()
246 movt(cond, tmp, imm >> 16); in HandleOutOfBoundsImmediate()
751 uint32_t imm = operand.GetImmediate(); in Delegate() local
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/third_party/mesa3d/src/amd/compiler/
Daco_insert_waitcnt.cpp115 wait_imm imm; member
123 : imm(imm_), events(event_), counters(get_counters_for_event(event_)), in wait_entry()
133 changed |= imm.combine(other.imm); in join()
145 imm.lgkm = wait_imm::unset_counter; in remove_counter()
150 imm.vm = wait_imm::unset_counter; in remove_counter()
156 imm.exp = wait_imm::unset_counter; in remove_counter()
162 imm.vs = wait_imm::unset_counter; in remove_counter()
272 wait.combine(it->second.imm); in check_instr()
296 wait.combine(it->second.imm); in check_instr()
302 parse_wait_instr(wait_ctx& ctx, wait_imm& imm, Instruction* instr) in parse_wait_instr() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrAliases.td65 // b<cond> $imm
66 def : InstAlias<!strconcat(!strconcat("b", cond), " $imm"),
67 (BCOND brtarget:$imm, condVal)>;
69 // b<cond>,a $imm
70 def : InstAlias<!strconcat(!strconcat("b", cond), ",a $imm"),
71 (BCONDA brtarget:$imm, condVal)>;
73 // b<cond> %icc, $imm
74 def : InstAlias<!strconcat(!strconcat("b", cond), " %icc, $imm"),
75 (BPICC brtarget:$imm, condVal)>, Requires<[HasV9]>;
77 // b<cond>,pt %icc, $imm
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td66 def i64immSExt32 : PatLeaf<(i64 imm),
68 def i32immSExt32 : PatLeaf<(i32 imm),
84 def BPF_CC_EQ : PatLeaf<(i64 imm),
86 def BPF_CC_NE : PatLeaf<(i64 imm),
88 def BPF_CC_GE : PatLeaf<(i64 imm),
90 def BPF_CC_GT : PatLeaf<(i64 imm),
92 def BPF_CC_GTU : PatLeaf<(i64 imm),
94 def BPF_CC_GEU : PatLeaf<(i64 imm),
96 def BPF_CC_LE : PatLeaf<(i64 imm),
98 def BPF_CC_LT : PatLeaf<(i64 imm),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td118 // Short jump targets have OtherVT type and are printed as pcrel imm values.
192 (MSP430selectcc GR8:$src, GR8:$src2, imm:$cc))]>;
196 (MSP430selectcc GR16:$src, GR16:$src2, imm:$cc))]>;
255 def Bi : I16ri<0b0100, (outs), (ins i16imm:$imm),
256 "br\t$imm",
257 [(brind tblockaddress:$imm)]>;
271 [(MSP430brcc bb:$dst, imm:$cond)]>;
285 (outs), (ins i16imm:$imm),
286 "call\t$imm", [(MSP430call imm:$imm)]>;
311 def PUSH16c : II16c<0b100, (outs), (ins cg16imm:$imm), "push\t$imm", []>;
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/third_party/libbpf/include/linux/
Dfilter.h14 .imm = IMM })
22 .imm = IMM })
30 .imm = IMM })
38 .imm = IMM })
46 .imm = 0 })
54 .imm = ((FUNC) - BPF_FUNC_unspec) })
62 .imm = 0 })
70 .imm = 0 })
78 .imm = IMM })
86 .imm = 0 })
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/third_party/mesa3d/src/gallium/frontends/d3d10umd/
DShaderTGSI.c318 if (sx->clip_distance_mapping[0].d3d == operand->base.index[0].imm) { in translate_semantic_index()
321 assert(sx->clip_distance_mapping[1].d3d == operand->base.index[0].imm); in translate_semantic_index()
429 unsigned idx = operand->base.index[0].imm; in dcl_base_output()
493 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS); in dcl_vs_input()
495 reg = ureg_DECL_vs_input(ureg, dst->base.index[0].imm); in dcl_vs_input()
497 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm, in dcl_vs_input()
507 assert(dst->base.index[1].imm < SHADER_MAX_INPUTS); in dcl_gs_input()
509 declare_vertices_in(sx, dst->base.index[0].imm); in dcl_gs_input()
513 if (!sx->inputs[dst->base.index[1].imm].reg.File) { in dcl_gs_input()
517 dst->base.index[1].imm, in dcl_gs_input()
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/third_party/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc35 IntegerOperand imm) { in AddSubHelper() argument
36 VIXL_ASSERT(imm.FitsInLane(zd)); in AddSubHelper()
39 if (TrySingleAddSub(option, zd, zn, imm)) return; in AddSubHelper()
47 IntegerOperand signed_imm(imm.AsIntN(zd.GetLaneSizeInBits())); in AddSubHelper()
59 Dup(scratch, imm); in AddSubHelper()
72 IntegerOperand imm) { in TrySingleAddSub() argument
73 VIXL_ASSERT(imm.FitsInLane(zd)); in TrySingleAddSub()
77 if (imm.TryEncodeAsShiftedUintNForLane<8, 0>(zd, &imm8, &shift) || in TrySingleAddSub()
78 imm.TryEncodeAsShiftedUintNForLane<8, 8>(zd, &imm8, &shift)) { in TrySingleAddSub()
96 IntegerOperand imm, in IntWideImmHelper() argument
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/third_party/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_x86sse.c455 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_reg_imm() argument
457 DUMP_RI( dst, imm ); in x86_mov_reg_imm()
461 emit_1i(p, imm); in x86_mov_reg_imm()
464 void x86_mov_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_imm() argument
466 DUMP_RI( dst, imm ); in x86_mov_imm()
468 x86_mov_reg_imm(p, dst, imm); in x86_mov_imm()
473 emit_1i(p, imm); in x86_mov_imm()
477 void x86_mov16_imm( struct x86_function *p, struct x86_reg dst, uint16_t imm ) in x86_mov16_imm() argument
479 DUMP_RI( dst, imm ); in x86_mov16_imm()
484 emit_2ub(p, imm & 0xff, imm >> 8); in x86_mov16_imm()
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Drtasm_x86sse.h203 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm );
204 void x86_add_imm( struct x86_function *p, struct x86_reg dst, int imm );
205 void x86_or_imm( struct x86_function *p, struct x86_reg dst, int imm );
206 void x86_and_imm( struct x86_function *p, struct x86_reg dst, int imm );
207 void x86_sub_imm( struct x86_function *p, struct x86_reg dst, int imm );
208 void x86_xor_imm( struct x86_function *p, struct x86_reg dst, int imm );
209 void x86_cmp_imm( struct x86_function *p, struct x86_reg dst, int imm );
256 void sse2_psllw_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
257 void sse2_pslld_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
258 void sse2_psllq_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td64 def LO16 : SDNodeXForm<imm, [{
71 def HI16 : SDNodeXForm<imm, [{
76 def NEG : SDNodeXForm<imm, [{
80 def LO21 : SDNodeXForm<imm, [{
105 def immShift : Operand<i32>, PatLeaf<(imm), [{
113 def imm10 : Operand<i32>, PatLeaf<(imm), [{
119 def i32lo16z : Operand<i32>, PatLeaf<(i32 imm), [{
125 def i32neg16 : Operand<i32>, PatLeaf<(i32 imm), [{
132 def i32lo16s : Operand<i32>, PatLeaf<(i32 imm), [{
140 def i32lo16and : Operand<i32>, PatLeaf<(i32 imm), [{
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