Searched refs:inc (Results 1 – 25 of 1211) sorted by relevance
12345678910>>...49
| /third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/vulkan/ |
| D | vk_internal_shaders_autogen.gni | 12 "shaders/gen/BlitResolve.frag.00000000.inc",
13 "shaders/gen/BlitResolve.frag.00000001.inc",
14 "shaders/gen/BlitResolve.frag.00000002.inc",
15 "shaders/gen/BlitResolve.frag.00000003.inc",
16 "shaders/gen/BlitResolve.frag.00000004.inc",
17 "shaders/gen/BlitResolve.frag.00000005.inc",
18 "shaders/gen/BlitResolve.frag.00000006.inc",
19 "shaders/gen/BlitResolve.frag.00000007.inc",
20 "shaders/gen/BlitResolve.frag.00000008.inc",
21 "shaders/gen/BlitResolve.frag.00000009.inc",
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | CMakeLists.txt | 3 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
6 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
9 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
10 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
11 tablegen(LLVM AArch64GenGICombiner.inc -gen-global-isel-combiner
13 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | CMakeLists.txt | 3 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
11 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
12 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/ |
| D | Android.bp | 61 "core.insts-unified1.inc",
62 "debuginfo.insts.inc",
63 "enum_string_mapping.inc",
64 "extension_enum.inc",
65 "glsl.std.450.insts.inc",
66 "opencl.debuginfo.100.insts.inc",
67 "opencl.std.insts.inc",
68 "operand.kinds-unified1.inc",
69 "spv-amd-gcn-shader.insts.inc",
70 "spv-amd-shader-ballot.insts.inc",
[all …]
|
| /third_party/skia/third_party/externals/spirv-tools/ |
| D | Android.mk | 192 $(call generate-file-dir,$(1)/core.insts-unified1.inc)
193 $(1)/core.insts-unified1.inc $(1)/operand.kinds-unified1.inc \
194 $(1)/glsl.std.450.insts.inc \
195 $(1)/opencl.std.insts.inc \
209 --core-insts-output=$(1)/core.insts-unified1.inc \
210 --glsl-insts-output=$(1)/glsl.std.450.insts.inc \
211 --opencl-insts-output=$(1)/opencl.std.insts.inc \
212 --operand-kinds-output=$(1)/operand.kinds-unified1.inc
214 $(LOCAL_PATH)/source/opcode.cpp: $(1)/core.insts-unified1.inc
215 $(LOCAL_PATH)/source/operand.cpp: $(1)/operand.kinds-unified1.inc
[all …]
|
| /third_party/spirv-tools/ |
| D | Android.mk | 200 $(call generate-file-dir,$(1)/core.insts-unified1.inc)
201 $(1)/core.insts-unified1.inc $(1)/operand.kinds-unified1.inc \
202 $(1)/glsl.std.450.insts.inc \
203 $(1)/opencl.std.insts.inc \
217 --core-insts-output=$(1)/core.insts-unified1.inc \
218 --glsl-insts-output=$(1)/glsl.std.450.insts.inc \
219 --opencl-insts-output=$(1)/opencl.std.insts.inc \
220 --operand-kinds-output=$(1)/operand.kinds-unified1.inc
222 $(LOCAL_PATH)/source/opcode.cpp: $(1)/core.insts-unified1.inc
223 $(LOCAL_PATH)/source/operand.cpp: $(1)/operand.kinds-unified1.inc
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | CMakeLists.txt | 3 tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM RISCVGenCompressInstEmitter.inc -gen-compress-inst-emitter)
6 tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM RISCVGenGlobalISel.inc -gen-global-isel)
9 tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
10 tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
11 tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
12 tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | CMakeLists.txt | 3 tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
6 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
9 tablegen(LLVM X86GenEVEX2VEXTables.inc -gen-x86-EVEX2VEX-tables)
10 tablegen(LLVM X86GenExegesis.inc -gen-exegesis)
11 tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | CMakeLists.txt | 3 tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
9 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
10 tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | CMakeLists.txt | 3 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
9 tablegen(LLVM MipsGenGlobalISel.inc -gen-global-isel)
10 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
11 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
[all …]
|
| /third_party/skia/third_party/externals/microhttpd/doc/ |
| D | Makefile.am | 15 chapters/basicauthentication.inc \
16 chapters/bibliography.inc \
17 chapters/exploringrequests.inc \
18 chapters/hellobrowser.inc \
19 chapters/introduction.inc \
20 chapters/largerpost.inc \
21 chapters/processingpost.inc \
22 chapters/responseheaders.inc \
23 chapters/tlsauthentication.inc \
24 chapters/sessions.inc \
|
| /third_party/cJSON/tests/unity/auto/ |
| D | generate_module.rb | 69 '' => { inc: [] }
72 '' => { inc: [] }
75 'Driver' => { inc: [create_filename('%1$s', 'Hardware.h')] },
76 'Hardware' => { inc: [] }
79 …'Driver' => { inc: [create_filename('%1$s', 'Hardware.h'), create_filename('%1$s', 'Interrupt.…
80 'Interrupt' => { inc: [create_filename('%1$s', 'Hardware.h')] },
81 'Hardware' => { inc: [] }
84 'Model' => { inc: [] },
85 …'Conductor' => { inc: [create_filename('%1$s', 'Model.h'), create_filename('%1$s', 'Hardware.h')]…
86 'Hardware' => { inc: [] }
[all …]
|
| D | generate_test_runner.rb | 60 testfile_includes.delete_if { |inc| inc =~ /(unity|cmock)/ }
141 system: source.scan(/^\s*#include\s+<\s*(.+)\s*>/).flatten.map { |inc| "<#{inc}>" },
173 @options[:includes].flatten.uniq.compact.each do |inc|
174 output.puts("#include #{inc.include?('<') ? inc : "\"#{inc.gsub('.h', '')}.h\""}")
176 testfile_includes.each do |inc|
177 output.puts("#include #{inc.include?('<') ? inc : "\"#{inc.gsub('.h', '')}.h\""}")
388 @options[:includes].flatten.uniq.compact.each do |inc|
389 output.puts("#include #{inc.include?('<') ? inc : "\"#{inc.gsub('.h', '')}.h\""}")
391 testfile_includes.each do |inc|
392 output.puts("#include #{inc.include?('<') ? inc : "\"#{inc.gsub('.h', '')}.h\""}")
|
| /third_party/unity/auto/ |
| D | generate_module.rb | 72 '' => { inc: [] }
75 '' => { inc: [] }
78 'Driver' => { inc: [create_filename('%1$s', 'Hardware.h')] },
79 'Hardware' => { inc: [] }
82 …'Driver' => { inc: [create_filename('%1$s', 'Hardware.h'), create_filename('%1$s', 'Interrupt.…
83 'Interrupt' => { inc: [create_filename('%1$s', 'Hardware.h')] },
84 'Hardware' => { inc: [] }
87 'Model' => { inc: [] },
88 …'Conductor' => { inc: [create_filename('%1$s', 'Model.h'), create_filename('%1$s', 'Hardware.h')]…
89 'Hardware' => { inc: [] }
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | CMakeLists.txt | 3 tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
9 tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
10 tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
11 tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
12 tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | CMakeLists.txt | 3 tablegen(LLVM LanaiGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM LanaiGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM LanaiGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM LanaiGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM LanaiGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM LanaiGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM LanaiGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM LanaiGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM LanaiGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | CMakeLists.txt | 3 tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | CMakeLists.txt | 3 tablegen(LLVM MSP430GenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM MSP430GenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM MSP430GenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | CMakeLists.txt | 3 tablegen(LLVM AVRGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AVRGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AVRGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AVRGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM AVRGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM AVRGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM AVRGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AVRGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM AVRGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/python/Lib/test/ |
| D | test_scope.py | 17 inc = make_adder(1)
20 self.assertEqual(inc(1), 2)
32 inc = make_adder2(1)
35 self.assertEqual(inc(1), 2)
46 inc = make_adder3(0)
49 self.assertEqual(inc(1), 2)
78 inc = make_adder5(1)
81 self.assertEqual(inc(1), 2)
93 inc = make_adder6(1)
96 self.assertEqual(inc(1), 11) # there's only one global
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | CMakeLists.txt | 3 tablegen(LLVM BPFGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM BPFGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM BPFGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM BPFGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM BPFGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM BPFGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM BPFGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM BPFGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM BPFGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | CMakeLists.txt | 3 tablegen(LLVM SystemZGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM SystemZGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/openh264/codec/common/ |
| D | generate_version.sh | 18 mkdir -p codec/common/inc
19 cat $SRC_PATH/codec/common/inc/version_gen.h.template | sed "s/\$FULL_VERSION/$GIT_VERSION/g" > cod…
20 if cmp codec/common/inc/version_gen.h.new codec/common/inc/version_gen.h > /dev/null 2>&1; then
22 rm codec/common/inc/version_gen.h.new
26 mv codec/common/inc/version_gen.h.new codec/common/inc/version_gen.h
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | CMakeLists.txt | 3 tablegen(LLVM HexagonGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
8 tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
9 tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
10 tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
11 tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
12 tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | CMakeLists.txt | 3 tablegen(LLVM WebAssemblyGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM WebAssemblyGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM WebAssemblyGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM WebAssemblyGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM WebAssemblyGenFastISel.inc -gen-fast-isel)
8 tablegen(LLVM WebAssemblyGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM WebAssemblyGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM WebAssemblyGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)
|
12345678910>>...49