Searched refs:ir3_shader_debug (Results 1 – 15 of 15) sorted by relevance
254 enum ir3_shader_debug { enum278 extern enum ir3_shader_debug ir3_shader_debug;284 if (ir3_shader_debug & IR3_DBG_DISASM) in shader_debug_enabled()289 return !!(ir3_shader_debug & IR3_DBG_SHADER_VS); in shader_debug_enabled()291 return !!(ir3_shader_debug & IR3_DBG_SHADER_TCS); in shader_debug_enabled()293 return !!(ir3_shader_debug & IR3_DBG_SHADER_TES); in shader_debug_enabled()295 return !!(ir3_shader_debug & IR3_DBG_SHADER_GS); in shader_debug_enabled()297 return !!(ir3_shader_debug & IR3_DBG_SHADER_FS); in shader_debug_enabled()300 return !!(ir3_shader_debug & IR3_DBG_SHADER_CS); in shader_debug_enabled()310 if (ir3_shader_debug & IR3_DBG_OPTMSGS) { in ir3_debug_print()
58 DEBUG_GET_ONCE_FLAGS_OPTION(ir3_shader_debug, "IR3_SHADER_DEBUG",63 enum ir3_shader_debug ir3_shader_debug = 0; variable157 ir3_shader_debug = debug_get_option_ir3_shader_debug(); in ir3_compiler_create()162 ir3_shader_debug |= IR3_DBG_NOCACHE; in ir3_compiler_create()309 if (compiler->gen >= 5 && !(ir3_shader_debug & IR3_DBG_NOFP16)) in ir3_compiler_create()
330 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_finalize_nir()366 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_finalize_nir()465 !(ir3_shader_debug & IR3_DBG_NOFP16)) { in ir3_nir_post_finalize()633 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_nir_lower_variant()730 !(ir3_shader_debug & IR3_DBG_NOPREAMBLE)) in ir3_nir_lower_variant()804 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_nir_lower_variant()
51 if (ir3_shader_debug & IR3_DBG_NOCACHE) in ir3_disk_cache_init()65 uint64_t driver_flags = ir3_shader_debug; in ir3_disk_cache_init()
32 #define RA_DEBUG (ir3_shader_debug & IR3_DBG_RAMSGS)
580 if (ir3_shader_debug & IR3_DBG_RAMSGS) in ir3_merge_regs()
645 !(ir3_shader_debug & IR3_DBG_FORCES2EN)) { in instr_cp()
140 if (ir3_shader_debug & IR3_DBG_NOUBOOPT) in gather_ubo_ranges()
35 #define SCHED_DEBUG (ir3_shader_debug & IR3_DBG_SCHEDMSGS)
34 #define SCHED_DEBUG (ir3_shader_debug & IR3_DBG_SCHEDMSGS)
420 if (ir3_shader_debug & IR3_DBG_DISASM) { in create_variant()
2586 if (ir3_shader_debug & IR3_DBG_SPILLALL) in ir3_ra()
305 ir3_shader_debug |= IR3_DBG_OPTMSGS | IR3_DBG_DISASM; in main()388 if (ir3_shader_debug & IR3_DBG_OPTMSGS) in main()394 if (ir3_shader_debug & IR3_DBG_OPTMSGS) in main()
303 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_shader_compute_state_create()361 if (ir3_shader_debug & IR3_DBG_DISASM) { in ir3_shader_state_create()
2619 _mesa_sha1_update(ctx, &ir3_shader_debug, sizeof(ir3_shader_debug)); in tu_hash_compiler()