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Searched refs:isOperationLegal (Results 1 – 13 of 13) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp688 return TLI.isOperationLegal(Opcode, VT); in hasOperation()
1140 if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT)) in PromoteOperand()
1146 if (!TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, PVT)) in SExtPromoteOperand()
2147 (TLI.isOperationLegal(ISD::XOR, X.getValueType()) && in visitADDLike()
2148 TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) && in visitADDLike()
2316 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitADD()
2946 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in tryFoldToZero()
2999 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT)) in visitSUB()
4095 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { in visitMULHS()
4151 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { in visitMULHU()
[all …]
DTargetLowering.cpp1696 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
1729 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
1753 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
3401 (isOperationLegal(ISD::SETCC, newVT) && in SimplifySetCC()
4782 if (IsAfterLegalization ? isOperationLegal(ISD::MULHS, VT) in BuildSDIV()
4785 else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) in BuildSDIV()
4902 if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) in BuildUDIV()
4905 if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) in BuildUDIV()
5508 return isOperationLegal(ISD::ConstantFP, VT) || in isNegatibleForFree()
5520 if (isOperationLegal(ISD::ConstantFP, VT) && in isNegatibleForFree()
[all …]
DLegalizeIntegerTypes.cpp518 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
523 !TLI.isOperationLegal(ISD::STRICT_FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DSwitchLoweringUtils.cpp283 if (!TLI->isOperationLegal(ISD::SHL, PTy)) in findBitTestClusters()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetLowering.h1056 bool isOperationLegal(unsigned Op, EVT VT) const { in isOperationLegal() function
2533 return isOperationLegal(ISD::FMAD, N->getValueType(0)); in isFMADLegalForFAddFSub()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1899 if (!isOperationLegal(ISD::BUILD_VECTOR, VT)) in PerformDAGCombine()
DAMDGPUISelLowering.cpp2257 if (isOperationLegal(ISD::FTRUNC, VT)) in LowerFROUND()
3070 isOperationLegal(ISD::BUILD_VECTOR, MVT::v2i16)) { in performShlCombine()
DSIISelLowering.cpp9444 isOperationLegal(ISD::FMAD, VT)) in getFusedOpcode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp3477 return TLI->isOperationLegal(IsSigned ? ISD::SDIVREM : ISD::UDIVREM, VT); in hasDivRemOp()
DX86ISelLowering.cpp5108 if (isOperationLegal(ISD::MUL, VT)) in decomposeMulByConstant()
8191 if (isAfterLegalize && !TLI.isOperationLegal(ISD::LOAD, VT)) in EltsFromConsecutiveLoads()
21592 TLI.isOperationLegal(ISD::UMIN, VT)) { in LowerVSETCC()
25782 if (Opcode == ISD::UADDSAT && !TLI.isOperationLegal(ISD::UMIN, VT)) { in LowerADDSAT_SUBSAT()
25788 if (Opcode == ISD::USUBSAT && !TLI.isOperationLegal(ISD::UMAX, VT)) { in LowerADDSAT_SUBSAT()
37847 if (!DAG.getTargetLoweringInfo().isOperationLegal(ISD::SUB, MaskVT)) in combineLogicBlendIntoConditionalNegate()
40140 if (TLI.isTypeLegal(VT) && TLI.isOperationLegal(ISD::CTPOP, VT)) in combineParity()
42020 TLI.isOperationLegal(SrcOpcode, VT) && in combineTruncatedArithmetic()
42021 !TLI.isOperationLegal(SrcOpcode, SrcVT)) in combineTruncatedArithmetic()
42027 if (TLI.isOperationLegal(SrcOpcode, VT) && in combineTruncatedArithmetic()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp15454 if (VT.isVector() && TLI.isOperationLegal(Opcode, VT) && in stripModuloOnShift()
15662 isOperationLegal(ISD::MUL, N->getValueType(0))) in combineMUL()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4906 if (isOperationLegal(ISD::SCALAR_TO_VECTOR, VT) && isScalarToVector(Op)) in lowerBUILD_VECTOR()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp11675 if (TLI.isOperationLegal(N->getOpcode(), N->getValueType(0))) in PerformABSCombine()