Searched refs:is_int10 (Results 1 – 9 of 9) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_llvm_ps.c | 261 bool is_int8, is_int10; in si_llvm_init_ps_export_args() local
270 is_int10 = (key->ps.part.epilog.color_is_int10 >> cbuf) & 0x1; in si_llvm_init_ps_export_args()
382 packed = packi(&ctx->ac, pack_args, is_int8 ? 8 : is_int10 ? 10 : 16, chan == 1); in si_llvm_init_ps_export_args()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 537 unsigned col_format = 0, is_int8 = 0, is_int10 = 0, is_float32 = 0; in radv_pipeline_compute_spi_color_formats() local
555 is_int10 |= 1 << i; in radv_pipeline_compute_spi_color_formats()
592 blend->col_format_is_int10 = is_int10; in radv_pipeline_compute_spi_color_formats()
622 bool is_int10 = format_is_int10(format); in radv_format_meta_fs_key() local
628 else if (col_format == V_028714_SPI_SHADER_UINT16_ABGR && is_int10) in radv_format_meta_fs_key()
630 else if (col_format == V_028714_SPI_SHADER_SINT16_ABGR && is_int10) in radv_format_meta_fs_key()
3347 key.ps.is_int10 = blend->col_format_is_int10; in radv_generate_graphics_pipeline_key()
4298 bool is_int10 = (pipeline_key->ps.is_int10 >> slot) & 1; in radv_lower_fs_output() local
4338 unsigned max_rgb = is_int8 ? 255 : is_int10 ? 1023 : 0; in radv_lower_fs_output()
4340 if (is_int8 || is_int10) { in radv_lower_fs_output()
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| D | radv_shader.h | 95 uint32_t is_int10; member
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| D | radv_nir_to_llvm.c | 601 bool is_int10 = (ctx->options->key.ps.is_int10 >> index) & 1; in si_llvm_init_export_args() local
712 packed = packi(&ctx->ac, pack_args, is_int8 ? 8 : is_int10 ? 10 : 16, chan == 1); in si_llvm_init_export_args()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | assembler-mips.cc | 1295 DCHECK(wd.is_valid() && is_int10(imm10)); in GenInstrMsaI10()
1345 DCHECK(rs.is_valid() && wd.is_valid() && is_int10(s10)); in GenInstrMsaMI10()
2986 if (is_int10(source.offset())) { \
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | assembler-mips64.cc | 1224 DCHECK(wd.is_valid() && is_int10(imm10)); in GenInstrMsaI10()
1274 DCHECK(rs.is_valid() && wd.is_valid() && is_int10(s10)); in GenInstrMsaMI10()
3192 if (is_int10(source.offset())) { \
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 11166 bool is_int10; member
11267 if (out->is_int8 || out->is_int10) { in export_fs_mrt_color()
11269 uint32_t max_rgb = out->is_int8 ? 255 : out->is_int10 ? 1023 : 0; in export_fs_mrt_color()
11272 uint32_t max = i == 3 && out->is_int10 ? 3 : max_rgb; in export_fs_mrt_color()
11286 if (out->is_int8 || out->is_int10) { in export_fs_mrt_color()
11288 uint32_t max_rgb = out->is_int8 ? 127 : out->is_int10 ? 511 : 0; in export_fs_mrt_color()
11289 uint32_t min_rgb = out->is_int8 ? -128 : out->is_int10 ? -512 : 0; in export_fs_mrt_color()
11292 uint32_t max = i == 3 && out->is_int10 ? 1 : max_rgb; in export_fs_mrt_color()
11293 uint32_t min = i == 3 && out->is_int10 ? -2u : min_rgb; in export_fs_mrt_color()
12556 out.is_int10 = (key->color_is_int10 >> i) & 1; in select_ps_epilog()
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| D | macro-assembler-riscv64.cc | 383 } else if (FLAG_riscv_c_extension && is_int10(rt.immediate()) && in Add64()
467 } else if (FLAG_riscv_c_extension && is_int10(-rt.immediate()) && in Sub64()
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| D | assembler-riscv64.cc | 2235 DCHECK(is_int10(imm10) && (imm10 & 0xf) == 0); in c_addi16sp()
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