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Searched refs:kDoubleRegZero (Results 1 – 25 of 26) sorted by relevance

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/third_party/node/deps/v8/src/compiler/backend/loong64/
Dcode-generator-loong64.cc65 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroDoubleRegister()
71 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroSingleRegister()
1143 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1145 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1200 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1202 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1511 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1512 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1523 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1524 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/compiler/backend/riscv64/
Dcode-generator-riscv64.cc76 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroDoubleRegister()
82 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroSingleRegister()
1207 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1209 __ LoadFPRImmediate(kDoubleRegZero, 0.0f); in AssembleArchInstruction()
1269 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1271 __ LoadFPRImmediate(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1646 if (ft == kDoubleRegZero && !__ IsSingleZeroRegSet()) { in AssembleArchInstruction()
1647 __ LoadFPRImmediate(kDoubleRegZero, 0.0f); in AssembleArchInstruction()
1656 if (ft == kDoubleRegZero && !__ IsSingleZeroRegSet()) { in AssembleArchInstruction()
1657 __ LoadFPRImmediate(kDoubleRegZero, 0.0f); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/codegen/s390/
Dmacro-assembler-s390.cc73 lzdr(kDoubleRegZero); in DoubleMax()
74 cdbr(left_reg, kDoubleRegZero); in DoubleMax()
118 lzdr(kDoubleRegZero); in DoubleMin()
119 cdbr(left_reg, kDoubleRegZero); in DoubleMin()
169 lzdr(kDoubleRegZero); in FloatMax()
170 cebr(left_reg, kDoubleRegZero); in FloatMax()
215 lzdr(kDoubleRegZero); in FloatMin()
216 cebr(left_reg, kDoubleRegZero); in FloatMin()
1123 lzdr(kDoubleRegZero); in CallRecordWriteStub()
1124 sdbr(dst, kDoubleRegZero); in CallRecordWriteStub()
[all …]
Dregister-s390.h170 constexpr DoubleRegister kDoubleRegZero = d14; variable
/third_party/node/deps/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc65 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroDoubleRegister()
71 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroSingleRegister()
1215 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1217 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1270 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1272 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1677 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1678 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1687 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1688 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc64 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroDoubleRegister()
70 if (instr_->InputAt(index)->IsImmediate()) return kDoubleRegZero; in InputOrZeroSingleRegister()
1162 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1164 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1214 if ((left == kDoubleRegZero || right == kDoubleRegZero) && in AssembleArchInstruction()
1216 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1563 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1564 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
1573 if (ft == kDoubleRegZero && !__ IsDoubleZeroRegSet()) { in AssembleArchInstruction()
1574 __ Move(kDoubleRegZero, 0.0); in AssembleArchInstruction()
[all …]
/third_party/node/deps/v8/src/codegen/loong64/
Dregister-loong64.h157 constexpr DoubleRegister kDoubleRegZero = f29; variable
Dmacro-assembler-loong64.cc1892 fmov_d(dst, kDoubleRegZero); in CallRecordWriteStub()
1894 Neg_d(dst, kDoubleRegZero); in CallRecordWriteStub()
1900 if (dst == kDoubleRegZero) has_double_zero_reg_set_ = true; in CallRecordWriteStub()
2940 fsub_d(dst, src, kDoubleRegZero); in CallRecordWriteStub()
/third_party/node/deps/v8/src/codegen/mips64/
Dregister-mips64.h216 constexpr DoubleRegister kDoubleRegZero = f28; variable
Dmacro-assembler-mips64.cc2503 Move(kDoubleRegZero, 0.0); in CallRecordWriteStub()
2510 sub_d(dst, src, kDoubleRegZero); in CallRecordWriteStub()
2567 Move(kDoubleRegZero, 0.0); in CallRecordWriteStub()
2574 sub_s(dst, src, kDoubleRegZero); in CallRecordWriteStub()
2980 mov_d(dst, kDoubleRegZero); in CallRecordWriteStub()
2982 Neg_d(dst, kDoubleRegZero); in CallRecordWriteStub()
3006 if (dst == kDoubleRegZero) has_double_zero_reg_set_ = true; in CallRecordWriteStub()
4752 sub_d(dst, src, kDoubleRegZero); in CallRecordWriteStub()
/third_party/node/deps/v8/src/codegen/mips/
Dregister-mips.h207 constexpr DoubleRegister kDoubleRegZero = f28; variable
Dmacro-assembler-mips.cc2056 Move(kDoubleRegZero, 0.0); in CallRecordWriteStub()
2063 sub_s(dst, src, kDoubleRegZero); in CallRecordWriteStub()
2333 mov_d(dst, kDoubleRegZero); in CallRecordWriteStub()
2335 Neg_d(dst, kDoubleRegZero); in CallRecordWriteStub()
2359 if (dst == kDoubleRegZero) has_double_zero_reg_set_ = true; in CallRecordWriteStub()
4226 sub_d(dst, src, kDoubleRegZero); in CallRecordWriteStub()
/third_party/node/deps/v8/src/codegen/riscv64/
Dregister-riscv64.h267 constexpr DoubleRegister kDoubleRegZero = fs9; variable
Dmacro-assembler-riscv64.cc2419 if (dst != kDoubleRegZero) fmv_s(dst, kDoubleRegZero); in LoadFPRImmediate()
2421 Neg_s(dst, kDoubleRegZero); in LoadFPRImmediate()
2423 if (dst == kDoubleRegZero) { in LoadFPRImmediate()
2440 if (dst != kDoubleRegZero) fmv_d(dst, kDoubleRegZero); in LoadFPRImmediate()
2442 Neg_d(dst, kDoubleRegZero); in LoadFPRImmediate()
2444 if (dst == kDoubleRegZero) { in LoadFPRImmediate()
3635 fsub_d(dst, src, kDoubleRegZero); in FPUCanonicalizeNaN()
/third_party/node/deps/v8/src/codegen/ppc/
Dregister-ppc.h231 constexpr DoubleRegister kDoubleRegZero = d14; variable
Dmacro-assembler-ppc.cc893 fsub(dst, src, kDoubleRegZero); in CallRecordWriteStub()
1822 fcmpu(lhs, kDoubleRegZero); in CallRecordWriteStub()
1870 fcmpu(lhs, kDoubleRegZero); in CallRecordWriteStub()
/third_party/node/deps/v8/src/codegen/arm/
Dregister-arm.h280 constexpr LowDwVfpRegister kDoubleRegZero = d13; variable
Dmacro-assembler-arm.cc866 vsub(dst, src, kDoubleRegZero, cond); in CallRecordWriteStub()
/third_party/node/deps/v8/src/builtins/ppc/
Dbuiltins-ppc.cc829 __ LoadDoubleLiteral(kDoubleRegZero, base::Double(0.0), r0); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/builtins/loong64/
Dbuiltins-loong64.cc561 __ Move(kDoubleRegZero, 0.0); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/builtins/arm/
Dbuiltins-arm.cc577 __ vmov(kDoubleRegZero, base::Double(0.0)); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/builtins/mips64/
Dbuiltins-mips64.cc564 __ Move(kDoubleRegZero, 0.0); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/builtins/riscv64/
Dbuiltins-riscv64.cc595 __ LoadFPRImmediate(kDoubleRegZero, 0.0); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/builtins/mips/
Dbuiltins-mips.cc402 __ Move(kDoubleRegZero, 0.0); in Generate_JSEntryVariant()
/third_party/node/deps/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc2476 __ vpadd(Neon32, tmp.low(), tmp.low(), kDoubleRegZero); in AssembleArchInstruction()

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