| /third_party/json/tests/src/ |
| D | unit-comparison.cpp | 69 constexpr auto lt = std::partial_ordering::less; variable
145 {eq, lt, lt, lt, lt, lt, lt, lt, lt, un}, // 0
146 {gt, eq, lt, lt, lt, lt, lt, lt, lt, un}, // 1
147 {gt, gt, eq, eq, eq, lt, lt, lt, lt, un}, // 2
148 {gt, gt, eq, eq, eq, lt, lt, lt, lt, un}, // 3
149 {gt, gt, eq, eq, eq, lt, lt, lt, lt, un}, // 4
150 {gt, gt, gt, gt, gt, eq, lt, lt, lt, un}, // 5
151 {gt, gt, gt, gt, gt, gt, eq, lt, lt, un}, // 6
152 {gt, gt, gt, gt, gt, gt, gt, eq, lt, un}, // 7
501 … {eq, eq, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, lt, un, un}, // 0
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| /third_party/vixl/test/aarch32/ |
| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm8-in-it-block-t32.cc | 104 {{lt, r0, r0, 203}, true, lt, "lt r0 r0 203", "lt_r0_r0_203"},
113 {{lt, r3, r3, 207}, true, lt, "lt r3 r3 207", "lt_r3_r3_207"},
125 {{lt, r1, r1, 158}, true, lt, "lt r1 r1 158", "lt_r1_r1_158"},
130 {{lt, r7, r7, 224}, true, lt, "lt r7 r7 224", "lt_r7_r7_224"},
147 {{lt, r3, r3, 43}, true, lt, "lt r3 r3 43", "lt_r3_r3_43"},
172 {{lt, r6, r6, 229}, true, lt, "lt r6 r6 229", "lt_r6_r6_229"},
173 {{lt, r4, r4, 128}, true, lt, "lt r4 r4 128", "lt_r4_r4_128"},
193 {{lt, r4, r4, 57}, true, lt, "lt r4 r4 57", "lt_r4_r4_57"},
197 {{lt, r4, r4, 216}, true, lt, "lt r4 r4 216", "lt_r4_r4_216"},
202 {{lt, r5, r5, 215}, true, lt, "lt r5 r5 215", "lt_r5_r5_215"},
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| D | test-assembler-cond-rd-operand-rn-in-it-block-t32.cc | 2571 {{lt, r0, r0}, true, lt, "lt r0 r0", "lt_r0_r0"},
2572 {{lt, r0, r1}, true, lt, "lt r0 r1", "lt_r0_r1"},
2573 {{lt, r0, r2}, true, lt, "lt r0 r2", "lt_r0_r2"},
2574 {{lt, r0, r3}, true, lt, "lt r0 r3", "lt_r0_r3"},
2575 {{lt, r0, r4}, true, lt, "lt r0 r4", "lt_r0_r4"},
2576 {{lt, r0, r5}, true, lt, "lt r0 r5", "lt_r0_r5"},
2577 {{lt, r0, r6}, true, lt, "lt r0 r6", "lt_r0_r6"},
2578 {{lt, r0, r7}, true, lt, "lt r0 r7", "lt_r0_r7"},
2579 {{lt, r0, r8}, true, lt, "lt r0 r8", "lt_r0_r8"},
2580 {{lt, r0, r9}, true, lt, "lt r0 r9", "lt_r0_r9"},
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| D | test-assembler-cond-rdlow-operand-imm8-in-it-block-t32.cc | 104 {{lt, r4, 152}, true, lt, "lt r4 152", "lt_r4_152"},
113 {{lt, r4, 185}, true, lt, "lt r4 185", "lt_r4_185"},
117 {{lt, r7, 97}, true, lt, "lt r7 97", "lt_r7_97"},
124 {{lt, r4, 103}, true, lt, "lt r4 103", "lt_r4_103"},
130 {{lt, r4, 49}, true, lt, "lt r4 49", "lt_r4_49"},
160 {{lt, r4, 39}, true, lt, "lt r4 39", "lt_r4_39"},
164 {{lt, r3, 206}, true, lt, "lt r3 206", "lt_r3_206"},
214 {{lt, r5, 192}, true, lt, "lt r5 192", "lt_r5_192"},
310 {{lt, r1, 139}, true, lt, "lt r1 139", "lt_r1_139"},
322 {{lt, r4, 67}, true, lt, "lt r4 67", "lt_r4_67"},
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| D | test-assembler-cond-rd-operand-rn-low-registers-in-it-block-t32.cc | 799 {{lt, r0, r0}, true, lt, "lt r0 r0", "lt_r0_r0"},
800 {{lt, r0, r1}, true, lt, "lt r0 r1", "lt_r0_r1"},
801 {{lt, r0, r2}, true, lt, "lt r0 r2", "lt_r0_r2"},
802 {{lt, r0, r3}, true, lt, "lt r0 r3", "lt_r0_r3"},
803 {{lt, r0, r4}, true, lt, "lt r0 r4", "lt_r0_r4"},
804 {{lt, r0, r5}, true, lt, "lt r0 r5", "lt_r0_r5"},
805 {{lt, r0, r6}, true, lt, "lt r0 r6", "lt_r0_r6"},
806 {{lt, r0, r7}, true, lt, "lt r0 r7", "lt_r0_r7"},
807 {{lt, r1, r0}, true, lt, "lt r1 r0", "lt_r1_r0"},
808 {{lt, r1, r1}, true, lt, "lt r1 r1", "lt_r1_r1"},
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| D | test-assembler-cond-rdlow-rnlow-operand-immediate-zero-in-it-block-t32.cc | 799 {{lt, r0, r0, 0}, true, lt, "lt r0 r0 0", "lt_r0_r0_0"},
800 {{lt, r0, r1, 0}, true, lt, "lt r0 r1 0", "lt_r0_r1_0"},
801 {{lt, r0, r2, 0}, true, lt, "lt r0 r2 0", "lt_r0_r2_0"},
802 {{lt, r0, r3, 0}, true, lt, "lt r0 r3 0", "lt_r0_r3_0"},
803 {{lt, r0, r4, 0}, true, lt, "lt r0 r4 0", "lt_r0_r4_0"},
804 {{lt, r0, r5, 0}, true, lt, "lt r0 r5 0", "lt_r0_r5_0"},
805 {{lt, r0, r6, 0}, true, lt, "lt r0 r6 0", "lt_r0_r6_0"},
806 {{lt, r0, r7, 0}, true, lt, "lt r0 r7 0", "lt_r0_r7_0"},
807 {{lt, r1, r0, 0}, true, lt, "lt r1 r0 0", "lt_r1_r0_0"},
808 {{lt, r1, r1, 0}, true, lt, "lt r1 r1 0", "lt_r1_r1_0"},
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| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm3-in-it-block-t32.cc | 105 {{lt, r4, r5, 7}, true, lt, "lt r4 r5 7", "lt_r4_r5_7"},
106 {{lt, r6, r7, 1}, true, lt, "lt r6 r7 1", "lt_r6_r7_1"},
121 {{lt, r5, r2, 0}, true, lt, "lt r5 r2 0", "lt_r5_r2_0"},
136 {{lt, r7, r5, 2}, true, lt, "lt r7 r5 2", "lt_r7_r5_2"},
146 {{lt, r0, r4, 5}, true, lt, "lt r0 r4 5", "lt_r0_r4_5"},
151 {{lt, r1, r5, 5}, true, lt, "lt r1 r5 5", "lt_r1_r5_5"},
179 {{lt, r1, r5, 4}, true, lt, "lt r1 r5 4", "lt_r1_r5_4"},
183 {{lt, r5, r1, 0}, true, lt, "lt r5 r1 0", "lt_r5_r1_0"},
190 {{lt, r2, r0, 5}, true, lt, "lt r2 r0 5", "lt_r2_r0_5"},
214 {{lt, r4, r0, 6}, true, lt, "lt r4 r0 6", "lt_r4_r0_6"},
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| D | test-assembler-cond-rd-rn-operand-rm-all-low-rd-is-rn-in-it-block-t32.cc | 111 {{lt, r0, r0, r4}, true, lt, "lt r0 r0 r4", "lt_r0_r0_r4"},
133 {{lt, r0, r0, r2}, true, lt, "lt r0 r0 r2", "lt_r0_r0_r2"},
163 {{lt, r2, r2, r1}, true, lt, "lt r2 r2 r1", "lt_r2_r2_r1"},
170 {{lt, r2, r2, r7}, true, lt, "lt r2 r2 r7", "lt_r2_r2_r7"},
187 {{lt, r4, r4, r0}, true, lt, "lt r4 r4 r0", "lt_r4_r4_r0"},
200 {{lt, r5, r5, r5}, true, lt, "lt r5 r5 r5", "lt_r5_r5_r5"},
220 {{lt, r3, r3, r7}, true, lt, "lt r3 r3 r7", "lt_r3_r3_r7"},
230 {{lt, r5, r5, r2}, true, lt, "lt r5 r5 r2", "lt_r5_r5_r2"},
231 {{lt, r6, r6, r4}, true, lt, "lt r6 r6 r4", "lt_r6_r6_r4"},
234 {{lt, r4, r4, r5}, true, lt, "lt r4 r4 r5", "lt_r4_r4_r5"},
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| D | test-assembler-cond-rdlow-rnlow-rmlow-in-it-block-t32.cc | 799 {{lt, r0, r0, r0}, true, lt, "lt r0 r0 r0", "lt_r0_r0_r0"},
800 {{lt, r0, r1, r0}, true, lt, "lt r0 r1 r0", "lt_r0_r1_r0"},
801 {{lt, r0, r2, r0}, true, lt, "lt r0 r2 r0", "lt_r0_r2_r0"},
802 {{lt, r0, r3, r0}, true, lt, "lt r0 r3 r0", "lt_r0_r3_r0"},
803 {{lt, r0, r4, r0}, true, lt, "lt r0 r4 r0", "lt_r0_r4_r0"},
804 {{lt, r0, r5, r0}, true, lt, "lt r0 r5 r0", "lt_r0_r5_r0"},
805 {{lt, r0, r6, r0}, true, lt, "lt r0 r6 r0", "lt_r0_r6_r0"},
806 {{lt, r0, r7, r0}, true, lt, "lt r0 r7 r0", "lt_r0_r7_r0"},
807 {{lt, r1, r0, r1}, true, lt, "lt r1 r0 r1", "lt_r1_r0_r1"},
808 {{lt, r1, r1, r1}, true, lt, "lt r1 r1 r1", "lt_r1_r1_r1"},
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| D | test-assembler-cond-rd-operand-rn-shift-amount-1to31-in-it-block-t32.cc | 98 {{lt, r5, r3, LSL, 21}, true, lt, "lt r5 r3 LSL 21", "lt_r5_r3_LSL_21"},
102 {{lt, r4, r2, LSL, 31}, true, lt, "lt r4 r2 LSL 31", "lt_r4_r2_LSL_31"},
117 {{lt, r0, r0, LSL, 27}, true, lt, "lt r0 r0 LSL 27", "lt_r0_r0_LSL_27"},
125 {{lt, r4, r5, LSL, 25}, true, lt, "lt r4 r5 LSL 25", "lt_r4_r5_LSL_25"},
141 {{lt, r7, r3, LSL, 28}, true, lt, "lt r7 r3 LSL 28", "lt_r7_r3_LSL_28"},
156 {{lt, r4, r6, LSL, 19}, true, lt, "lt r4 r6 LSL 19", "lt_r4_r6_LSL_19"},
163 {{lt, r5, r3, LSL, 20}, true, lt, "lt r5 r3 LSL 20", "lt_r5_r3_LSL_20"},
178 {{lt, r0, r0, LSL, 14}, true, lt, "lt r0 r0 LSL 14", "lt_r0_r0_LSL_14"},
191 {{lt, r2, r3, LSL, 3}, true, lt, "lt r2 r3 LSL 3", "lt_r2_r3_LSL_3"},
195 {{lt, r5, r0, LSL, 14}, true, lt, "lt r5 r0 LSL 14", "lt_r5_r0_LSL_14"},
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| D | test-assembler-cond-rd-operand-rn-shift-amount-1to32-in-it-block-t32.cc | 152 {{lt, r2, r1, LSR, 2}, true, lt, "lt r2 r1 LSR 2", "lt_r2_r1_LSR_2"},
163 {{lt, r5, r4, LSR, 26}, true, lt, "lt r5 r4 LSR 26", "lt_r5_r4_LSR_26"},
171 {{lt, r5, r0, ASR, 4}, true, lt, "lt r5 r0 ASR 4", "lt_r5_r0_ASR_4"},
178 {{lt, r5, r2, LSR, 1}, true, lt, "lt r5 r2 LSR 1", "lt_r5_r2_LSR_1"},
179 {{lt, r7, r0, LSR, 13}, true, lt, "lt r7 r0 LSR 13", "lt_r7_r0_LSR_13"},
192 {{lt, r1, r1, LSR, 1}, true, lt, "lt r1 r1 LSR 1", "lt_r1_r1_LSR_1"},
200 {{lt, r4, r0, LSR, 5}, true, lt, "lt r4 r0 LSR 5", "lt_r4_r0_LSR_5"},
207 {{lt, r7, r6, ASR, 15}, true, lt, "lt r7 r6 ASR 15", "lt_r7_r6_ASR_15"},
211 {{lt, r5, r4, LSR, 5}, true, lt, "lt r5 r4 LSR 5", "lt_r5_r4_LSR_5"},
220 {{lt, r6, r5, ASR, 15}, true, lt, "lt r6 r5 ASR 15", "lt_r6_r5_ASR_15"},
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| D | test-assembler-cond-rd-rn-operand-rm-rd-is-rn-in-it-block-t32.cc | 111 {{lt, r3, r3, r4}, true, lt, "lt r3 r3 r4", "lt_r3_r3_r4"},
123 {{lt, r13, r13, r14}, true, lt, "lt r13 r13 r14", "lt_r13_r13_r14"},
131 {{lt, r2, r2, r11}, true, lt, "lt r2 r2 r11", "lt_r2_r2_r11"},
162 {{lt, r14, r14, r9}, true, lt, "lt r14 r14 r9", "lt_r14_r14_r9"},
173 {{lt, r13, r13, r9}, true, lt, "lt r13 r13 r9", "lt_r13_r13_r9"},
188 {{lt, r9, r9, r7}, true, lt, "lt r9 r9 r7", "lt_r9_r9_r7"},
205 {{lt, r1, r1, r5}, true, lt, "lt r1 r1 r5", "lt_r1_r1_r5"},
228 {{lt, r11, r11, r11}, true, lt, "lt r11 r11 r11", "lt_r11_r11_r11"},
246 {{lt, r4, r4, r8}, true, lt, "lt r4 r4 r8", "lt_r4_r4_r8"},
251 {{lt, r3, r3, r10}, true, lt, "lt r3 r3 r10", "lt_r3_r3_r10"},
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| D | test-assembler-cond-rd-operand-rn-shift-rs-in-it-block-t32.cc | 137 {{lt, r4, r4, ROR, r3}, true, lt, "lt r4 r4 ROR r3", "lt_r4_r4_ROR_r3"},
149 {{lt, r0, r0, LSR, r0}, true, lt, "lt r0 r0 LSR r0", "lt_r0_r0_LSR_r0"},
160 {{lt, r5, r5, LSR, r4}, true, lt, "lt r5 r5 LSR r4", "lt_r5_r5_LSR_r4"},
181 {{lt, r6, r6, LSR, r5}, true, lt, "lt r6 r6 LSR r5", "lt_r6_r6_LSR_r5"},
194 {{lt, r1, r1, LSR, r2}, true, lt, "lt r1 r1 LSR r2", "lt_r1_r1_LSR_r2"},
195 {{lt, r4, r4, LSL, r4}, true, lt, "lt r4 r4 LSL r4", "lt_r4_r4_LSL_r4"},
212 {{lt, r5, r5, LSL, r5}, true, lt, "lt r5 r5 LSL r5", "lt_r5_r5_LSL_r5"},
228 {{lt, r3, r3, ASR, r2}, true, lt, "lt r3 r3 ASR r2", "lt_r3_r3_ASR_r2"},
251 {{lt, r0, r0, ASR, r4}, true, lt, "lt r0 r0 ASR r4", "lt_r0_r0_ASR_r4"},
255 {{lt, r6, r6, ROR, r3}, true, lt, "lt r6 r6 ROR r3", "lt_r6_r6_ROR_r3"},
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| D | test-macro-assembler-cond-rd-rn-t32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
117 {{lt, r10, r6}, "lt, r10, r6", "lt_r10_r6"},
135 {{lt, r13, r12}, "lt, r13, r12", "lt_r13_r12"},
136 {{lt, r14, r3}, "lt, r14, r3", "lt_r14_r3"},
145 {{lt, r7, r12}, "lt, r7, r12", "lt_r7_r12"},
171 {{lt, r7, r13}, "lt, r7, r13", "lt_r7_r13"},
201 {{lt, r4, r10}, "lt, r4, r10", "lt_r4_r10"},
213 {{lt, r12, r3}, "lt, r12, r3", "lt_r12_r3"},
229 {{lt, r4, r12}, "lt, r4, r12", "lt_r4_r12"},
245 {{lt, r5, r11}, "lt, r5, r11", "lt_r5_r11"},
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| D | test-macro-assembler-cond-rd-rn-a32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
117 {{lt, r10, r6}, "lt, r10, r6", "lt_r10_r6"},
135 {{lt, r13, r12}, "lt, r13, r12", "lt_r13_r12"},
136 {{lt, r14, r3}, "lt, r14, r3", "lt_r14_r3"},
145 {{lt, r7, r12}, "lt, r7, r12", "lt_r7_r12"},
171 {{lt, r7, r13}, "lt, r7, r13", "lt_r7_r13"},
201 {{lt, r4, r10}, "lt, r4, r10", "lt_r4_r10"},
213 {{lt, r12, r3}, "lt, r12, r3", "lt_r12_r3"},
229 {{lt, r4, r12}, "lt, r4, r12", "lt_r4_r12"},
245 {{lt, r5, r11}, "lt, r5, r11", "lt_r5_r11"},
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| D | test-assembler-cond-rd-rn-operand-rm-all-low-in-it-block-t32.cc | 113 {{lt, r4, r3, r3}, true, lt, "lt r4 r3 r3", "lt_r4_r3_r3"},
121 {{lt, r3, r5, r2}, true, lt, "lt r3 r5 r2", "lt_r3_r5_r2"},
125 {{lt, r6, r3, r3}, true, lt, "lt r6 r3 r3", "lt_r6_r3_r3"},
138 {{lt, r6, r4, r1}, true, lt, "lt r6 r4 r1", "lt_r6_r4_r1"},
184 {{lt, r0, r5, r3}, true, lt, "lt r0 r5 r3", "lt_r0_r5_r3"},
193 {{lt, r4, r5, r7}, true, lt, "lt r4 r5 r7", "lt_r4_r5_r7"},
216 {{lt, r0, r0, r5}, true, lt, "lt r0 r0 r5", "lt_r0_r0_r5"},
291 {{lt, r0, r5, r1}, true, lt, "lt r0 r5 r1", "lt_r0_r5_r1"},
298 {{lt, r7, r4, r2}, true, lt, "lt r7 r4 r2", "lt_r7_r4_r2"},
316 {{lt, r4, r1, r5}, true, lt, "lt r4 r1 r5", "lt_r4_r1_r5"},
[all …]
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| D | test-assembler-cond-rd-rn-operand-rm-rd-is-rn-is-sp-in-it-block-t32.cc | 260 {{lt, r13, r13, r0}, true, lt, "lt r13 r13 r0", "lt_r13_r13_r0"},
261 {{lt, r13, r13, r1}, true, lt, "lt r13 r13 r1", "lt_r13_r13_r1"},
262 {{lt, r13, r13, r2}, true, lt, "lt r13 r13 r2", "lt_r13_r13_r2"},
263 {{lt, r13, r13, r3}, true, lt, "lt r13 r13 r3", "lt_r13_r13_r3"},
264 {{lt, r13, r13, r4}, true, lt, "lt r13 r13 r4", "lt_r13_r13_r4"},
265 {{lt, r13, r13, r5}, true, lt, "lt r13 r13 r5", "lt_r13_r13_r5"},
266 {{lt, r13, r13, r6}, true, lt, "lt r13 r13 r6", "lt_r13_r13_r6"},
267 {{lt, r13, r13, r7}, true, lt, "lt r13 r13 r7", "lt_r13_r13_r7"},
268 {{lt, r13, r13, r8}, true, lt, "lt r13 r13 r8", "lt_r13_r13_r8"},
269 {{lt, r13, r13, r9}, true, lt, "lt r13 r13 r9", "lt_r13_r13_r9"},
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| D | test-assembler-cond-rd-operand-rn-a32.cc | 108 {{{lt, r13, r2}, false, al, "lt r13 r2", "lt_r13_r2"},
117 {{lt, r2, r0}, false, al, "lt r2 r0", "lt_r2_r0"},
126 {{lt, r8, r3}, false, al, "lt r8 r3", "lt_r8_r3"},
130 {{lt, r8, r6}, false, al, "lt r8 r6", "lt_r8_r6"},
133 {{lt, r10, r2}, false, al, "lt r10 r2", "lt_r10_r2"},
144 {{lt, r6, r0}, false, al, "lt r6 r0", "lt_r6_r0"},
152 {{lt, r0, r12}, false, al, "lt r0 r12", "lt_r0_r12"},
153 {{lt, r2, r2}, false, al, "lt r2 r2", "lt_r2_r2"},
160 {{lt, r1, r11}, false, al, "lt r1 r11", "lt_r1_r11"},
161 {{lt, r4, r2}, false, al, "lt r4 r2", "lt_r4_r2"},
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| D | test-assembler-cond-rd-operand-const-can-use-pc-a32.cc | 117 {{lt, r14, 0x002ac000},
149 {{lt, r8, 0x000002ac}, false, al, "lt r8 0x000002ac", "lt_r8_0x000002ac"},
157 {{lt, r9, 0x000000ab}, false, al, "lt r9 0x000000ab", "lt_r9_0x000000ab"},
305 {{lt, r2, 0x000ff000}, false, al, "lt r2 0x000ff000", "lt_r2_0x000ff000"},
403 {{lt, r11, 0x00000ab0},
467 {{lt, r2, 0x0002ac00}, false, al, "lt r2 0x0002ac00", "lt_r2_0x0002ac00"},
591 {{lt, r8, 0x0ff00000}, false, al, "lt r8 0x0ff00000", "lt_r8_0x0ff00000"},
638 {{lt, r7, 0x0ab00000}, false, al, "lt r7 0x0ab00000", "lt_r7_0x0ab00000"},
662 {{lt, r6, 0x03fc0000}, false, al, "lt r6 0x03fc0000", "lt_r6_0x03fc0000"},
770 {{lt, r12, 0x00000000},
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| /third_party/skia/third_party/externals/tint/docs/ |
| D | translations.md | 116 | texture_1d<type> | OpTypeImage 1D Sampled=1 | texture1d<type, access::sample> | Textu…
117 | texture_2d<type> | OpTypeImage 2D Sampled=1 | texture2d<type, access::sample> | Textu…
118 | texture_2d_array<type> | OpTypeImage 2D Arrayed=1 Sampled=1 | texture2d_array<type, acce…
119 | texture_3d<type> | OpTypeImage 3D Sampled=1 | texture3d<type, access::sample> | Textu…
120 | texture_cube<type> | OpTypeImage Cube Sampled=1 | texturecube<type, access::sample> |…
121 | texture_cube_array<type> | OpTypeImage Cube Arrayed=1 Sampled=1 | texturecube_array<type…
123 | texture_multisampled_2d<type> | OpTypeImage 2D MS=1 Sampled=1 | texture2d_ms<type, acces…
125 | texture_depth_2d | OpTypeImage 2D Depth=1 Sampled=1 | depth2d<float, access::sample>| Textu…
126 | texture_depth_2d_array | OpTypeImage 2D Depth=1 Arrayed=1 Sampled=1 | depth2d_array<float, acc…
127 | texture_depth_cube | OpTypeImage Cube Depth=1 Sampled=1 | depthcube<float, access::sample> …
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| /third_party/node/deps/npm/node_modules/semver/ranges/ |
| D | subset.js | 98 let gt, lt variable
103 lt = lowerLT(lt, c, options)
114 if (gt && lt) {
115 gtltComp = compare(gt.semver, lt.semver, options)
118 } else if (gtltComp === 0 && (gt.operator !== '>=' || lt.operator !== '<=')) {
129 if (lt && !satisfies(eq, String(lt), options)) {
146 let needDomLTPre = lt &&
148 lt.semver.prerelease.length ? lt.semver : false
154 lt.operator === '<' && needDomLTPre.prerelease[0] === 0) {
179 if (lt) {
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| /third_party/lz4/programs/ |
| D | datagen.c | 72 static void RDG_fillLiteralDistrib(litDistribTable lt, double ld) in RDG_fillLiteralDistrib() argument
84 lt[u++] = character; in RDG_fillLiteralDistrib()
92 static BYTE RDG_genChar(U32* seed, const litDistribTable lt) in RDG_genChar() argument
95 return (lt[id]); in RDG_genChar()
102 …ffer, size_t buffSize, size_t prefixSize, double matchProba, litDistribTable lt, unsigned* seedPtr) in RDG_genBlock() argument
120 buffPtr[pos-1] = RDG_genChar(seed, lt); in RDG_genBlock()
125 buffPtr[0] = RDG_genChar(seed, lt); in RDG_genBlock()
149 while (pos < d) buffPtr[pos++] = RDG_genChar(seed, lt); in RDG_genBlock()
157 litDistribTable lt; in RDG_genBuffer() local
159 RDG_fillLiteralDistrib(lt, litProba); in RDG_genBuffer()
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| /third_party/libabigail/tests/data/test-read-dwarf/ |
| D | test-libandroid.so.abi | 362 …<class-decl name='BpInterface<android::IMountService>' size-in-bits='224' visibility='defaul…
873 …<class-decl name='sp<android::IMountServiceListener>' size-in-bits='32' visibility='default'…
911 …<class-decl name='sp<android::IMountShutdownObserver>' size-in-bits='32' visibility='default…
1114 …<class-decl name='__compressed_pair<android::IMountService *, std::__1::default_delete<andro…
1118 …<class-decl name='unique_ptr<android::IMountService, std::__1::default_delete<android::IMoun…
1168 …<class-decl name='__add_lvalue_reference_impl<android::IMountService, true>' size-in-bits='8…
1173 …<class-decl name='__compressed_pair_elem<android::IMountService *, 0, false>' size-in-bits='…
1190 …<class-decl name='__compressed_pair_elem<std::__1::default_delete<android::IMountService>…
1205 …<class-decl name='__pointer_type<android::IMountService, std::__1::default_delete<android::I…
1210 …<class-decl name='add_lvalue_reference<android::IMountService>' size-in-bits='8' is-struct='…
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|
| /third_party/python/Lib/turtledemo/ |
| D | penrose.py | 27 lt(36)
39 lt(36)
43 lt(36)
56 lt(36)
61 lt(18)
65 lt(36)
69 lt(36)
79 lt(36)
83 lt(54)
109 lt(72)
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|
| /third_party/rust/crates/cxx/book/src/ |
| D | bindings.md | 4 In addition to all the primitive types (i32 <=> int32_t), the following
14 …</td><td style="padding:3px 6px"><b><a href="binding/slice.md">rust::Slice<const T></a>…
15 …</td><td style="padding:3px 6px"><b><a href="binding/slice.md">rust::Slice<T></a></b></td><t…
17 <tr><td style="padding:3px 6px">Box<T></td><td style="padding:3px 6px"><b><a href="binding/bo…
18 …b><a href="binding/uniqueptr.md">UniquePtr<T></a></b></td><td style="padding:3px 6px">std::u…
19 …b><a href="binding/sharedptr.md">SharedPtr<T></a></b></td><td style="padding:3px 6px">std::s…
20 <tr><td style="padding:3px 6px">[T; N]</td><td style="padding:3px 6px">std::array<T, N></td><…
21 <tr><td style="padding:3px 6px">Vec<T></td><td style="padding:3px 6px"><b><a href="binding/ve…
22 …><b><a href="binding/cxxvector.md">CxxVector<T></a></b></td><td style="padding:3px 6px">std:…
24 …> V</td><td style="padding:3px 6px"><b><a href="binding/fn.md">rust::Fn<V(T, U)></a></b><…
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|