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Searched refs:mask_lo (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/compiler/nir/
Dnir_lower_double_ops.c341 nir_ssa_def *mask_lo = in lower_trunc() local
365 nir_iand(b, mask_lo, src_lo), in lower_trunc()
/third_party/node/deps/v8/src/compiler/backend/x64/
Dcode-generator-x64.cc3980 uint8_t mask_lo = i.InputUint8(1); in AssembleArchInstruction() local
3982 if (mask_lo != 0xe4) { in AssembleArchInstruction()
3983 ASSEMBLE_SIMD_IMM_INSTR(Pshuflw, dst, 0, mask_lo); in AssembleArchInstruction()
Dinstruction-selector-x64.cc3733 uint8_t mask_lo = wasm::SimdShuffle::PackShuffle4(shuffle16x8); in VisitI8x16Shuffle() local
3735 imms[imm_count++] = mask_lo; in VisitI8x16Shuffle()
/third_party/node/deps/v8/src/compiler/backend/ia32/
Dinstruction-selector-ia32.cc2977 uint8_t mask_lo = wasm::SimdShuffle::PackShuffle4(shuffle16x8); in VisitI8x16Shuffle() local
2979 imms[imm_count++] = mask_lo; in VisitI8x16Shuffle()
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_build.c3230 LLVMValueRef mask_lo = LLVMBuildExtractElement(ctx->builder, mask_vec, ctx->i32_0, ""); in ac_build_mbcnt_add() local
3233 (LLVMValueRef[]){mask_lo, ctx->i32_0}, 2, AC_FUNC_ATTR_READNONE); in ac_build_mbcnt_add()
/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp143 Operand mask_lo = mask.isUndefined() ? Operand::c32(-1u) : mask; in emit_mbcnt() local
144 return bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, Definition(dst), mask_lo, base); in emit_mbcnt()
147 Operand mask_lo = Operand::c32(-1u); in emit_mbcnt() local
154 mask_lo = Operand(mask_split.def(0).getTemp()); in emit_mbcnt()
157 mask_lo = Operand(exec_lo, s1); in emit_mbcnt()
161 Temp mbcnt_lo = bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, bld.def(v1), mask_lo, base); in emit_mbcnt()
/third_party/libbpf/.github/actions/build-selftests/
Dvmlinux.h22897 __u32 mask_lo; member