Searched refs:max_eus_per_subslice (Results 1 – 10 of 10) sorted by relevance
| /third_party/mesa3d/src/intel/dev/ |
| D | intel_device_info.c | 100 .max_eus_per_subslice = 8,
112 .max_eus_per_subslice = 8,
134 .max_eus_per_subslice = 10,
155 .max_eus_per_subslice = 12,
179 .max_eus_per_subslice = 6,
210 .max_eus_per_subslice = 12,
246 .max_eus_per_subslice = 6,
274 .max_eus_per_subslice = 12,
303 .max_eus_per_subslice = 4,
338 .max_eus_per_subslice = 10,
[all …]
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| D | intel_device_info_test.h | 12 assert(devinfo->max_eus_per_subslice != 0); in verify_device_info()
51 for (uint32_t eu = 0; eu < devinfo->max_eus_per_subslice; eu++) in verify_device_info()
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| D | intel_device_info.h | 227 unsigned max_eus_per_subslice; member
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| D | intel_dev_info.c | 144 for (unsigned eu = 0; eu < devinfo.max_eus_per_subslice; eu++) { in main()
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| D | intel_hwconfig.c | 192 DEVINFO_HWCONFIG(max_eus_per_subslice, item->val[0]); in apply_hwconfig_item()
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| /third_party/mesa3d/src/intel/tools/ |
| D | intel_noop_drm_shim.c | 246 *gp->value += i915.devinfo.num_subslices[s] * i915.devinfo.max_eus_per_subslice; in i915_ioctl_get_param()
272 DIV_ROUND_UP(i915.devinfo.max_eus_per_subslice, 8); in query_write_topology()
291 info->max_eus_per_subslice = i915.devinfo.max_eus_per_subslice; in query_write_topology()
296 info->eu_stride = DIV_ROUND_UP(info->max_eus_per_subslice, 8); in query_write_topology()
312 uint32_t eu_mask = (1u << info->max_eus_per_subslice) - 1; in query_write_topology()
313 for (uint32_t i = 0; i < DIV_ROUND_UP(info->max_eus_per_subslice, 8); i++) { in query_write_topology()
315 … (s * info->max_subslices + ss) * DIV_ROUND_UP(info->max_eus_per_subslice, 8) + i] = in query_write_topology()
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| /third_party/libdrm/include/drm/ |
| D | i915_drm.h | 1554 __u16 max_eus_per_subslice; member
1885 __u16 max_eus_per_subslice; member
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| /third_party/mesa3d/include/drm-uapi/ |
| D | i915_drm.h | 2136 __u16 max_eus_per_subslice; member
3042 __u16 max_eus_per_subslice; member
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_rt_builder.h | 80 devinfo->max_eus_per_subslice * in brw_nir_rt_load_num_simd_lanes_per_dss()
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| /third_party/mesa3d/src/intel/perf/ |
| D | intel_perf.c | 364 for (int eu = 0; eu < devinfo->max_eus_per_subslice; eu++) { in compute_topology_builtins()
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