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Searched refs:meta_va (Results 1 – 2 of 2) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_image.c778 uint64_t meta_va = 0; in si_set_mutable_tex_desc_fields() local
797 meta_va = gpu_address + plane->surface.meta_offset; in si_set_mutable_tex_desc_fields()
799 meta_va += plane->surface.u.legacy.color.dcc_level[base_level].dcc_offset; in si_set_mutable_tex_desc_fields()
803 meta_va |= dcc_tile_swizzle; in si_set_mutable_tex_desc_fields()
805 meta_va = gpu_address + plane->surface.meta_offset; in si_set_mutable_tex_desc_fields()
808 if (meta_va) { in si_set_mutable_tex_desc_fields()
811 state[7] = meta_va >> 8; in si_set_mutable_tex_desc_fields()
826 if (meta_va) { in si_set_mutable_tex_desc_fields()
839 S_00A018_META_DATA_ADDRESS_LO(meta_va >> 8); in si_set_mutable_tex_desc_fields()
842 state[7] = meta_va >> 16; in si_set_mutable_tex_desc_fields()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_descriptors.c293 uint64_t va, meta_va = 0; in si_set_mutable_tex_desc_fields() local
323 meta_va = tex->buffer.gpu_address + tex->surface.meta_offset; in si_set_mutable_tex_desc_fields()
326 meta_va += tex->surface.u.legacy.color.dcc_level[base_level].dcc_offset; in si_set_mutable_tex_desc_fields()
332 meta_va |= dcc_tile_swizzle; in si_set_mutable_tex_desc_fields()
335 meta_va = tex->buffer.gpu_address + tex->surface.meta_offset; in si_set_mutable_tex_desc_fields()
338 if (meta_va) in si_set_mutable_tex_desc_fields()
343 state[7] = meta_va >> 8; in si_set_mutable_tex_desc_fields()
352 if (meta_va) { in si_set_mutable_tex_desc_fields()
362 S_00A018_META_DATA_ADDRESS_LO(meta_va >> 8) | in si_set_mutable_tex_desc_fields()
380 state[7] = meta_va >> 16; in si_set_mutable_tex_desc_fields()
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