Searched refs:mmUVD_SOFT_RESET (Results 1 – 3 of 3) sorted by relevance
/third_party/libdrm/tests/amdgpu/ |
D | jpeg_tests.c | 58 #define mmUVD_SOFT_RESET 0x05a0 macro 341 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_bitstream() 349 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_bitstream() 434 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_target() 442 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_target()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | radeon_vcn_dec_jpeg.c | 78 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_bitstream() 86 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_bitstream() 171 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_target() 179 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_SOFT_RESET), COND0, TYPE3, (1 << 9)); in send_cmd_target()
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/third_party/mesa3d/src/amd/common/ |
D | ac_vcn_dec.h | 205 #define mmUVD_SOFT_RESET 0x05a0 macro
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