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Searched refs:ndst (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/compiler/nir/
Dnir_clone.c256 nir_dest *ndst, const nir_dest *dst) in __clone_dst() argument
258 ndst->is_ssa = dst->is_ssa; in __clone_dst()
260 nir_ssa_dest_init(ninstr, ndst, dst->ssa.num_components, in __clone_dst()
263 add_remap(state, &ndst->ssa, &dst->ssa); in __clone_dst()
265 ndst->reg.reg = remap_reg(state, dst->reg.reg); in __clone_dst()
267 ndst->reg.indirect = malloc(sizeof(nir_src)); in __clone_dst()
268 __clone_src(state, ninstr, ndst->reg.indirect, dst->reg.indirect); in __clone_dst()
270 ndst->reg.base_offset = dst->reg.base_offset; in __clone_dst()
/third_party/mesa3d/src/freedreno/ir3/
Dir3.c501 instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in instr_create() argument
507 unsigned sz = sizeof(*instr) + (ndst * sizeof(instr->dsts[0])) + in instr_create()
514 instr->srcs = instr->dsts + ndst; in instr_create()
517 instr->dsts_max = ndst; in instr_create()
525 ir3_instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in ir3_instr_create() argument
527 struct ir3_instruction *instr = instr_create(block, opc, ndst, nsrc); in ir3_instr_create()
Dir3.h714 int ndst, int nsrc);
/third_party/mesa3d/src/intel/compiler/
Dbrw_isa_info.h53 int ndst; member
Dbrw_eu_validate.c678 if (desc->ndst == 0) in is_mixed_float()
815 if (desc->ndst == 0) in general_restrictions_based_on_operand_types()
1036 if (desc->ndst != 0 && !dst_is_null(devinfo, inst)) in general_restrictions_on_region_parameters()
1167 if (desc->ndst != 0 && !dst_is_null(devinfo, inst)) { in general_restrictions_on_region_parameters()
1527 if (desc->ndst == 0 || dst_is_null(devinfo, inst)) in region_alignment_rules()
Dbrw_disasm.c2017 if (desc->ndst > 0) { in brw_disassemble_inst()
2475 desc && desc->ndst > 0 && in brw_disassemble_inst()
/third_party/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_parser.cpp397 int ndst = 0, ncount = 0; in prepare_alu_group() local
404 ndst++; in prepare_alu_group()
410 ndst++; in prepare_alu_group()
415 ndst++; in prepare_alu_group()
418 n->dst.resize(ndst); in prepare_alu_group()
Dsb_ra_init.cpp796 vvec sv, tv, ndst = n->dst; in split_vector_inst() local
798 split_vec(ndst, tv, sv, true); in split_vector_inst()
801 n->dst = ndst; in split_vector_inst()
/third_party/mesa3d/src/gallium/frontends/nine/
Dnine_shader.c355 unsigned ndst; member
368 BYTE ndst; member
410 for (i = 0; i < insn->ndst && i < ARRAY_SIZE(insn->dst); ++i) { in sm1_dump_instruction()
1417 if (!tx->insn.ndst || !tx->insn.dst[0].shift || tx->insn.opcode == D3DSIO_TEXKILL) in tx_apply_dst0_modifiers()
3230 for (i = 0; i < tx->insn.ndst && i < ARRAY_SIZE(dst); ++i) in NineTranslateInstruction_Generic()
3236 dst, tx->insn.ndst, in NineTranslateInstruction_Generic()
3491 insn->ndst = info->ndst; in sm1_parse_instruction()
3506 for (i = 0; i < insn->ndst; ++i) in sm1_parse_instruction()
/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_qir.c32 uint8_t ndst, nsrc; member