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Searched refs:nir_reg (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/lima/ir/gp/
Dnir.c41 static gpir_reg *reg_for_nir_reg(gpir_compiler *comp, nir_register *nir_reg) in reg_for_nir_reg() argument
43 unsigned index = nir_reg->index; in reg_for_nir_reg()
88 static void register_node_reg(gpir_block *block, gpir_node *node, nir_reg_dest *nir_reg) in register_node_reg() argument
90 block->comp->node_for_reg[nir_reg->reg->index] = node; in register_node_reg()
93 snprintf(node->name, sizeof(node->name), "reg%d", nir_reg->reg->index); in register_node_reg()
96 store->reg = reg_for_nir_reg(block->comp, nir_reg->reg); in register_node_reg()
/third_party/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c1058 foreach_list_typed(nir_register, nir_reg, node, list) { in ntt_setup_registers()
1059 if (nir_reg->num_array_elems != 0) { in ntt_setup_registers()
1060 struct ureg_dst decl = ureg_DECL_array_temporary(c->ureg, nir_reg->num_array_elems, true); in ntt_setup_registers()
1061 c->reg_temp[nir_reg->index] = decl; in ntt_setup_registers()
1063 c->num_temps += nir_reg->num_array_elems; in ntt_setup_registers()
1071 foreach_list_typed(nir_register, nir_reg, node, list) { in ntt_setup_registers()
1072 if (nir_reg->num_array_elems == 0) { in ntt_setup_registers()
1074 uint32_t write_mask = BITFIELD_MASK(nir_reg->num_components); in ntt_setup_registers()
1075 if (!ntt_try_store_in_tgsi_output(c, &decl, &nir_reg->uses, &nir_reg->if_uses)) { in ntt_setup_registers()
1076 if (nir_reg->bit_size == 64) { in ntt_setup_registers()
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/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_program.c1640 foreach_list_typed(nir_register, nir_reg, node, list) { in ntq_setup_registers()
1641 unsigned array_len = MAX2(nir_reg->num_array_elems, 1); in ntq_setup_registers()
1644 nir_reg->num_components); in ntq_setup_registers()
1646 _mesa_hash_table_insert(c->def_ht, nir_reg, qregs); in ntq_setup_registers()
1648 for (int i = 0; i < array_len * nir_reg->num_components; i++) in ntq_setup_registers()
/third_party/mesa3d/src/intel/compiler/
Dbrw_vec4_nir.cpp173 dst_reg_for_nir_reg(vec4_visitor *v, nir_register *nir_reg, in dst_reg_for_nir_reg() argument
178 reg = v->nir_locals[nir_reg->index]; in dst_reg_for_nir_reg()
179 if (nir_reg->bit_size == 64) in dst_reg_for_nir_reg()
/third_party/mesa3d/src/broadcom/compiler/
Dnir_to_vir.c2497 foreach_list_typed(nir_register, nir_reg, node, list) { in ntq_setup_registers()
2498 unsigned array_len = MAX2(nir_reg->num_array_elems, 1); in ntq_setup_registers()
2501 nir_reg->num_components); in ntq_setup_registers()
2503 _mesa_hash_table_insert(c->def_ht, nir_reg, qregs); in ntq_setup_registers()
2505 for (int i = 0; i < array_len * nir_reg->num_components; i++) in ntq_setup_registers()