| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_pipe.h | 126 unsigned num_dw; member
625 assert(cs->current.cdw + cb->num_dw <= cs->current.max_dw); in r600_emit_command_buffer()
626 memcpy(cs->current.buf + cs->current.cdw, cb->buf, 4 * cb->num_dw); in r600_emit_command_buffer()
627 cs->current.cdw += cb->num_dw; in r600_emit_command_buffer()
669 state->atom.num_dw = cb ? cb->num_dw : 0; in r600_set_cso_state_with_cb()
779 void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in, unsigned …
830 unsigned num_dw);
893 cb->buf[cb->num_dw++] = value; in r600_store_value()
898 assert(cb->num_dw+num <= cb->max_num_dw); in r600_store_array()
899 memcpy(&cb->buf[cb->num_dw], ptr, num * sizeof(ptr[0])); in r600_store_array()
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| D | eg_debug.c | 143 static uint32_t *ac_parse_packet3(FILE *f, uint32_t *ib, int *num_dw, in ac_parse_packet3() argument
268 *num_dw -= count + 2; in ac_parse_packet3()
285 static void eg_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id, in eg_parse_ib() argument
291 while (num_dw > 0) { in eg_parse_ib()
296 ib = ac_parse_packet3(f, ib, &num_dw, trace_id, in eg_parse_ib()
305 num_dw--; in eg_parse_ib()
316 if (num_dw < 0) { in eg_parse_ib()
343 eg_parse_ib(f, rctx->last_gfx.ib, rctx->last_gfx.num_dw, in eg_dump_last_ib()
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| D | r600_hw_context.c | 33 void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, in r600_need_cs_space() argument
58 num_dw += ctx->atoms[u_bit_scan64(&mask)]->num_dw; in r600_need_cs_space()
61 num_dw += R600_MAX_FLUSH_CS_DWORDS + R600_MAX_DRAW_CS_DWORDS; in r600_need_cs_space()
65 num_dw += (num_atomics * 16) + (num_atomics ? 16 : 0); in r600_need_cs_space()
68 num_dw += ctx->b.num_cs_dw_queries_suspend; in r600_need_cs_space()
72 num_dw += ctx->b.streamout.num_dw_for_end; in r600_need_cs_space()
77 num_dw += 3; in r600_need_cs_space()
81 num_dw += R600_MAX_FLUSH_CS_DWORDS; in r600_need_cs_space()
84 num_dw += 10; in r600_need_cs_space()
87 if (!ctx->b.ws->cs_check_space(&ctx->b.gfx.cs, num_dw)) { in r600_need_cs_space()
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| D | r600_streamout.c | 96 begin->num_dw = 12; /* flush_vgt_streamout */ in r600_streamout_buffers_dirty()
98 begin->num_dw += num_bufs * 7; /* SET_CONTEXT_REG */ in r600_streamout_buffers_dirty()
101 begin->num_dw += num_bufs * 5; /* STRMOUT_BASE_UPDATE */ in r600_streamout_buffers_dirty()
103 begin->num_dw += in r600_streamout_buffers_dirty()
364 rctx->streamout.enable_atom.num_dw = 6; in r600_streamout_init()
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| D | r600_pipe_common.h | 412 unsigned num_dw; member
484 unsigned num_dw; member
612 void (*need_gfx_cs_space)(struct pipe_context *ctx, unsigned num_dw,
705 void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
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| D | r600_query.c | 1763 atom->num_dw = 0; in r600_render_condition()
1766 atom->num_dw += (qbuf->results_end / rquery->result_size) * 5; in r600_render_condition()
1769 atom->num_dw *= R600_MAX_STREAMS; in r600_render_condition()
1793 unsigned num_dw = 0; in r600_queries_num_cs_dw_for_resuming() local
1797 num_dw += query->num_cs_dw_begin + query->num_cs_dw_end; in r600_queries_num_cs_dw_for_resuming()
1804 num_dw += query->num_cs_dw_end; in r600_queries_num_cs_dw_for_resuming()
1807 num_dw += ctx->streamout.enable_atom.num_dw; in r600_queries_num_cs_dw_for_resuming()
1809 num_dw += 13; in r600_queries_num_cs_dw_for_resuming()
1811 return num_dw; in r600_queries_num_cs_dw_for_resuming()
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| D | r600_state_common.c | 46 void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw) in r600_init_command_buffer() argument
49 cb->buf = CALLOC(1, 4 * num_dw); in r600_init_command_buffer()
50 cb->max_num_dw = num_dw; in r600_init_command_buffer()
72 unsigned num_dw) in r600_init_atom() argument
75 atom->num_dw = num_dw; in r600_init_atom()
444 state->atom.num_dw = in r600_sampler_states_dirty()
566 rctx->vertex_buffer_state.atom.num_dw = (rctx->b.gfx_level >= EVERGREEN ? 12 : 11) * in r600_vertex_buffers_dirty()
638 state->atom.num_dw = (rctx->b.gfx_level >= EVERGREEN ? 14 : 13) * in r600_sampler_views_dirty()
1262 state->atom.num_dw = rctx->b.gfx_level >= EVERGREEN ? util_bitcount(state->dirty_mask)*20 in r600_constant_buffers_dirty()
1593 state->atom.num_dw = shader->command_buffer.num_dw; in update_shader_atom()
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| D | r600_pipe_common.c | 228 void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw, in r600_need_dma_space() argument
265 num_dw++; /* for emit_wait_idle below */ in r600_need_dma_space()
266 if (!ctx->ws->cs_check_space(&ctx->dma.cs, num_dw) || in r600_need_dma_space()
270 assert((num_dw + ctx->dma.cs.current.cdw) <= ctx->dma.cs.current.max_dw); in r600_need_dma_space()
447 saved->num_dw = cs->prev_dw + cs->current.cdw; in radeon_save_cs()
448 saved->ib = MALLOC(4 * saved->num_dw); in radeon_save_cs()
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| D | r600_viewport.c | 451 rctx->scissors.atom.num_dw = (2 + 16 * 2) + 6; in r600_init_viewport_functions()
452 rctx->viewports.atom.num_dw = 2 + 16 * 6; in r600_init_viewport_functions()
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| D | r600_state.c | 380 memcpy(blend->buffer_no_blend.buf, blend->buffer.buf, blend->buffer.num_dw * 4); in r600_create_blend_state_mode()
381 blend->buffer_no_blend.num_dw = blend->buffer.num_dw; in r600_create_blend_state_mode()
1210 rctx->framebuffer.atom.num_dw = in r600_set_framebuffer_state()
1214 rctx->framebuffer.atom.num_dw += 15 * rctx->framebuffer.state.nr_cbufs; in r600_set_framebuffer_state()
1215 rctx->framebuffer.atom.num_dw += 3 * (2 + rctx->framebuffer.state.nr_cbufs); in r600_set_framebuffer_state()
1218 rctx->framebuffer.atom.num_dw += 16; in r600_set_framebuffer_state()
1220 rctx->framebuffer.atom.num_dw += 3; in r600_set_framebuffer_state()
1223 rctx->framebuffer.atom.num_dw += 2; in r600_set_framebuffer_state()
2459 cb->num_dw = 0; in r600_update_ps_state()
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| D | evergreen_state.c | 374 memcpy(blend->buffer_no_blend.buf, blend->buffer.buf, blend->buffer.num_dw * 4); in evergreen_create_blend_state_mode()
375 blend->buffer_no_blend.num_dw = blend->buffer.num_dw; in evergreen_create_blend_state_mode()
1567 rctx->framebuffer.atom.num_dw = 4; /* SCISSOR */ in evergreen_set_framebuffer_state()
1571 rctx->framebuffer.atom.num_dw += 17; /* Evergreen */ in evergreen_set_framebuffer_state()
1573 rctx->framebuffer.atom.num_dw += 28; /* Cayman */ in evergreen_set_framebuffer_state()
1576 rctx->framebuffer.atom.num_dw += state->nr_cbufs * 23; in evergreen_set_framebuffer_state()
1577 rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2; in evergreen_set_framebuffer_state()
1578 rctx->framebuffer.atom.num_dw += (12 - state->nr_cbufs) * 3; in evergreen_set_framebuffer_state()
1582 rctx->framebuffer.atom.num_dw += 24; in evergreen_set_framebuffer_state()
1583 rctx->framebuffer.atom.num_dw += 2; in evergreen_set_framebuffer_state()
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| D | evergreen_compute.c | 752 rctx->cs_shader_state.atom.num_dw = current->command_buffer.num_dw; in compute_emit_cs()
820 …rctx->cs_vertex_buffer_state.atom.num_dw = 12 * util_bitcount(rctx->cs_vertex_buffer_state.dirty_m… in compute_emit_cs()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_debug.c | 67 unsigned num_dw; member
218 if (ib->cur_dw < ib->num_dw) { in ac_ib_get()
457 ib->num_dw = G_3F2_IB_SIZE(control_dw); in ac_parse_packet3()
465 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw); in ac_parse_packet3()
488 } else if (count == 0 && ib->cur_dw < ib->num_dw && AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) { in ac_parse_packet3()
537 while (ib->cur_dw < ib->num_dw) { in ac_do_parse_ib()
611 void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids, in ac_parse_ib_chunk() argument
617 ib.num_dw = num_dw; in ac_parse_ib_chunk()
638 if (ib.cur_dw > ib.num_dw) { in ac_parse_ib_chunk()
658 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids, unsigned trace_id_count, in ac_parse_ib() argument
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| D | ac_debug.h | 62 void ac_parse_ib_chunk(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids,
65 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids, unsigned trace_id_count,
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| /third_party/mesa3d/src/gallium/include/winsys/ |
| D | radeon_winsys.h | 710 static inline bool radeon_emitted(struct radeon_cmdbuf *cs, unsigned num_dw) in radeon_emitted() argument
712 return cs && (cs->prev_dw + cs->current.cdw > num_dw); in radeon_emitted()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_debug.c | 53 saved->num_dw = cs->prev_dw + cs->current.cdw; in si_save_cs()
54 saved->ib = MALLOC(4 * saved->num_dw); in si_save_cs()
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| D | si_pipe.h | 542 unsigned num_dw; member
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| /third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_cs.c | 1504 int num_dw = cs->base.cdw; in radv_amdgpu_winsys_cs_dump() local
1508 num_dw = cs->ib.size; in radv_amdgpu_winsys_cs_dump()
1511 ac_parse_ib(file, ib, num_dw, trace_ids, trace_id_count, "main IB", cs->ws->info.gfx_level, in radv_amdgpu_winsys_cs_dump()
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