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Searched refs:nxv2f32 (Results 1 – 10 of 10) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h192 nxv2f32 = 122, // n x 2 x f32 enumerator
532 case nxv2f32: in getVectorElementType()
650 case nxv2f32: in getVectorNumElements()
750 case nxv2f32: in getSizeInBits()
1069 if (NumElements == 2) return MVT::nxv2f32; in getScalableVectorVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td78 nxv2f32, nxv4f32, nxv2f64],
81 nxv2f32, nxv4f32, nxv2f64],
158 nxv2f32, nxv4f32, nxv2f64],
DAArch64SVEInstrInfo.td1174 defm : pred_load<nxv2f32, nxv2i1, nonext_masked_load, LD1W_D_IMM>;
1207 defm : pred_store<nxv2f32, nxv2i1, nontrunc_masked_store, ST1W_D_IMM>;
DAArch64RegisterInfo.td865 nxv2f32, nxv4f32,
DSVEInstrFormats.td1200 def : SVE_3_Op_Pat<nxv2f32, op, nxv2i1, nxv2f32, nxv2f32, !cast<Instruction>(NAME # _D)>;
5300 def : SVE_2_Op_Pat<f32, op, nxv2i1, nxv2f32, !cast<Instruction>(NAME # _S)>;
DAArch64ISelLowering.cpp182 addRegisterClass(MVT::nxv2f32, &AArch64::ZPRRegClass); in AArch64TargetLowering()
12348 case MVT::nxv2f32: in getSVEContainerType()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc155 LocVT == MVT::nxv2f32 ||
174 LocVT == MVT::nxv2f32 ||
1161 LocVT == MVT::nxv2f32 ||
DAArch64GenRegisterInfo.inc5187 …T::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv2f32, MVT::nxv4f32, MV…
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td155 def nxv2f32 : ValueType<64 , 122>; // n x 2 x f32 vector value
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp301 case MVT::nxv2f32: in getTypeForEVT()