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Searched refs:op1 (Results 1 – 25 of 178) sorted by relevance

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/third_party/optimized-routines/math/test/testcases/directed/
Dpow.tst6 func=pow op1=00000000.00000000 op2=00000000.00000000 result=3ff00000.00000000 errno=0
7 func=pow op1=00000000.00000000 op2=00000000.00000001 result=00000000.00000000 errno=0
8 func=pow op1=00000000.00000000 op2=00100000.00000000 result=00000000.00000000 errno=0
9 func=pow op1=00000000.00000000 op2=1fffffff.ffffffff result=00000000.00000000 errno=0
10 func=pow op1=00000000.00000000 op2=3bdfffff.ffffffff result=00000000.00000000 errno=0
11 func=pow op1=00000000.00000000 op2=3be00000.00000000 result=00000000.00000000 errno=0
12 func=pow op1=00000000.00000000 op2=3fe00000.00000000 result=00000000.00000000 errno=0
13 func=pow op1=00000000.00000000 op2=3ff00000.00000000 result=00000000.00000000 errno=0
14 func=pow op1=00000000.00000000 op2=40000000.00000000 result=00000000.00000000 errno=0
15 func=pow op1=00000000.00000000 op2=40080000.00000000 result=00000000.00000000 errno=0
[all …]
Dpowf.tst6 func=powf op1=7f800001 op2=7f800001 result=7fc00001 errno=0 status=i
7 func=powf op1=7f800001 op2=ff800001 result=7fc00001 errno=0 status=i
8 func=powf op1=7f800001 op2=7fc00001 result=7fc00001 errno=0 status=i
9 func=powf op1=7f800001 op2=ffc00001 result=7fc00001 errno=0 status=i
10 func=powf op1=7f800001 op2=7f800000 result=7fc00001 errno=0 status=i
11 func=powf op1=7f800001 op2=40800000 result=7fc00001 errno=0 status=i
12 func=powf op1=7f800001 op2=40400000 result=7fc00001 errno=0 status=i
13 func=powf op1=7f800001 op2=3f000000 result=7fc00001 errno=0 status=i
14 func=powf op1=7f800001 op2=00000000 result=7fc00001 errno=0 status=i
15 func=powf op1=7f800001 op2=80000000 result=7fc00001 errno=0 status=i
[all …]
Dlogf.tst6 func=logf op1=7fc00001 result=7fc00001 errno=0
7 func=logf op1=ffc00001 result=7fc00001 errno=0
8 func=logf op1=7f800001 result=7fc00001 errno=0 status=i
9 func=logf op1=ff800001 result=7fc00001 errno=0 status=i
10 func=logf op1=ff810000 result=7fc00001 errno=0 status=i
11 func=logf op1=7f800000 result=7f800000 errno=0
12 func=logf op1=ff800000 result=7fc00001 errno=EDOM status=i
13 func=logf op1=3f800000 result=00000000 errno=0
14 func=logf op1=00000000 result=ff800000 errno=ERANGE status=z
15 func=logf op1=80000000 result=ff800000 errno=ERANGE status=z
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Dsincosf.tst7 func=sincosf_sinf op1=7fc00001 result=7fc00001 errno=0
8 func=sincosf_sinf op1=ffc00001 result=7fc00001 errno=0
9 func=sincosf_sinf op1=7f800001 result=7fc00001 errno=0 status=i
10 func=sincosf_sinf op1=ff800001 result=7fc00001 errno=0 status=i
11 func=sincosf_sinf op1=7f800000 result=7fc00001 errno=EDOM status=i
12 func=sincosf_sinf op1=ff800000 result=7fc00001 errno=EDOM status=i
13 func=sincosf_sinf op1=00000000 result=00000000 errno=0
14 func=sincosf_sinf op1=80000000 result=80000000 errno=0
15 func=sincosf_sinf op1=c70d39a1 result=be37fad5.7ed errno=0
16 func=sincosf_sinf op1=46427f1b result=3f352d80.f9b error=0
[all …]
Dexp.tst6 func=exp op1=7ff80000.00000001 result=7ff80000.00000001 errno=0
7 func=exp op1=fff80000.00000001 result=7ff80000.00000001 errno=0
8 func=exp op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i
9 func=exp op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i
10 func=exp op1=7ff00000.00000000 result=7ff00000.00000000 errno=0
11 func=exp op1=fff00000.00000000 result=00000000.00000000 errno=0
12 func=exp op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox
13 func=exp op1=ffefffff.ffffffff result=00000000.00000000 errno=ERANGE status=ux
14 func=exp op1=00000000.00000000 result=3ff00000.00000000 errno=0
15 func=exp op1=80000000.00000000 result=3ff00000.00000000 errno=0
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Dexp2.tst6 func=exp2 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0
7 func=exp2 op1=fff80000.00000001 result=7ff80000.00000001 errno=0
8 func=exp2 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i
9 func=exp2 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i
10 func=exp2 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0
11 func=exp2 op1=fff00000.00000000 result=00000000.00000000 errno=0
12 func=exp2 op1=7fefffff.ffffffff result=7ff00000.00000000 errno=ERANGE status=ox
13 func=exp2 op1=ffefffff.ffffffff result=00000000.00000000 errno=ERANGE status=ux
14 func=exp2 op1=00000000.00000000 result=3ff00000.00000000 errno=0
15 func=exp2 op1=80000000.00000000 result=3ff00000.00000000 errno=0
[all …]
Dlog2f.tst6 func=log2f op1=7fc00001 result=7fc00001 errno=0
7 func=log2f op1=ffc00001 result=7fc00001 errno=0
8 func=log2f op1=7f800001 result=7fc00001 errno=0 status=i
9 func=log2f op1=ff800001 result=7fc00001 errno=0 status=i
10 func=log2f op1=ff810000 result=7fc00001 errno=0 status=i
11 func=log2f op1=7f800000 result=7f800000 errno=0
12 func=log2f op1=ff800000 result=7fc00001 errno=EDOM status=i
13 func=log2f op1=3f800000 result=00000000 errno=0
14 func=log2f op1=00000000 result=ff800000 errno=ERANGE status=z
15 func=log2f op1=80000000 result=ff800000 errno=ERANGE status=z
[all …]
Dexp2f.tst6 func=exp2f op1=7fc00001 result=7fc00001 errno=0
7 func=exp2f op1=ffc00001 result=7fc00001 errno=0
8 func=exp2f op1=7f800001 result=7fc00001 errno=0 status=i
9 func=exp2f op1=ff800001 result=7fc00001 errno=0 status=i
10 func=exp2f op1=7f800000 result=7f800000 errno=0
11 func=exp2f op1=7f7fffff result=7f800000 errno=ERANGE status=ox
12 func=exp2f op1=ff800000 result=00000000 errno=0
13 func=exp2f op1=ff7fffff result=00000000 errno=ERANGE status=ux
14 func=exp2f op1=00000000 result=3f800000 errno=0
15 func=exp2f op1=80000000 result=3f800000 errno=0
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Dexpf.tst6 func=expf op1=7fc00001 result=7fc00001 errno=0
7 func=expf op1=ffc00001 result=7fc00001 errno=0
8 func=expf op1=7f800001 result=7fc00001 errno=0 status=i
9 func=expf op1=ff800001 result=7fc00001 errno=0 status=i
10 func=expf op1=7f800000 result=7f800000 errno=0
11 func=expf op1=7f7fffff result=7f800000 errno=ERANGE status=ox
12 func=expf op1=ff800000 result=00000000 errno=0
13 func=expf op1=ff7fffff result=00000000 errno=ERANGE status=ux
14 func=expf op1=00000000 result=3f800000 errno=0
15 func=expf op1=80000000 result=3f800000 errno=0
[all …]
Dsinf.tst7 func=sinf op1=7fc00001 result=7fc00001 errno=0
8 func=sinf op1=ffc00001 result=7fc00001 errno=0
9 func=sinf op1=7f800001 result=7fc00001 errno=0 status=i
10 func=sinf op1=ff800001 result=7fc00001 errno=0 status=i
11 func=sinf op1=7f800000 result=7fc00001 errno=EDOM status=i
12 func=sinf op1=ff800000 result=7fc00001 errno=EDOM status=i
13 func=sinf op1=00000000 result=00000000 errno=0
14 func=sinf op1=80000000 result=80000000 errno=0
16 func=sinf op1=c70d39a1 result=be37fad5.7ed errno=0
19 func=sinf op1=46427f1b result=3f352d80.f9b error=0
[all …]
Dcosf.tst6 func=cosf op1=7fc00001 result=7fc00001 errno=0
7 func=cosf op1=ffc00001 result=7fc00001 errno=0
8 func=cosf op1=7f800001 result=7fc00001 errno=0 status=i
9 func=cosf op1=ff800001 result=7fc00001 errno=0 status=i
10 func=cosf op1=7f800000 result=7fc00001 errno=EDOM status=i
11 func=cosf op1=ff800000 result=7fc00001 errno=EDOM status=i
12 func=cosf op1=00000000 result=3f800000 errno=0
13 func=cosf op1=80000000 result=3f800000 errno=0
16 func=cosf op1=46427f1b result=3f34dc5c.565 error=0
17 func=cosf op1=4647e568 result=3f34dc33.c1f error=0
[all …]
Dlog.tst6 func=log op1=7ff80000.00000001 result=7ff80000.00000001 errno=0
7 func=log op1=fff80000.00000001 result=7ff80000.00000001 errno=0
8 func=log op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i
9 func=log op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i
10 func=log op1=7ff00000.00000000 result=7ff00000.00000000 errno=0
11 func=log op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i
12 func=log op1=7fefffff.ffffffff result=40862e42.fefa39ef.354 errno=0
13 func=log op1=ffefffff.ffffffff result=7ff80000.00000001 errno=EDOM status=i
14 func=log op1=3ff00000.00000000 result=00000000.00000000 errno=0
15 func=log op1=bff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i
[all …]
Dlog2.tst6 func=log2 op1=7ff80000.00000001 result=7ff80000.00000001 errno=0
7 func=log2 op1=fff80000.00000001 result=7ff80000.00000001 errno=0
8 func=log2 op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i
9 func=log2 op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i
10 func=log2 op1=7ff00000.00000000 result=7ff00000.00000000 errno=0
11 func=log2 op1=fff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i
12 func=log2 op1=7fefffff.ffffffff result=408fffff.ffffffff.ffa errno=0
13 func=log2 op1=ffefffff.ffffffff result=7ff80000.00000001 errno=EDOM status=i
14 func=log2 op1=3ff00000.00000000 result=00000000.00000000 errno=0
15 func=log2 op1=bff00000.00000000 result=7ff80000.00000001 errno=EDOM status=i
[all …]
Derff.tst6 func=erff op1=7fc00001 result=7fc00001 errno=0
7 func=erff op1=ffc00001 result=7fc00001 errno=0
8 func=erff op1=7f800001 result=7fc00001 errno=0 status=i
9 func=erff op1=ff800001 result=7fc00001 errno=0 status=i
10 func=erff op1=7f800000 result=3f800000 errno=0
11 func=erff op1=ff800000 result=bf800000 errno=0
12 func=erff op1=00000000 result=00000000 errno=ERANGE
13 func=erff op1=80000000 result=80000000 errno=ERANGE
14 func=erff op1=00000001 result=00000001 errno=0 status=ux
15 func=erff op1=80000001 result=80000001 errno=0 status=ux
[all …]
Derf.tst6 func=erf op1=7ff80000.00000001 result=7ff80000.00000001 errno=0
7 func=erf op1=fff80000.00000001 result=7ff80000.00000001 errno=0
8 func=erf op1=7ff00000.00000001 result=7ff80000.00000001 errno=0 status=i
9 func=erf op1=fff00000.00000001 result=7ff80000.00000001 errno=0 status=i
10 func=erf op1=7ff00000.00000000 result=3ff00000.00000000 errno=0
11 func=erf op1=fff00000.00000000 result=bff00000.00000000 errno=0
12 func=erf op1=00000000.00000000 result=00000000.00000000 errno=ERANGE
13 func=erf op1=80000000.00000000 result=80000000.00000000 errno=ERANGE
14 func=erf op1=00000000.00000001 result=00000000.00000001 errno=0 status=ux
15 func=erf op1=80000000.00000001 result=80000000.00000001 errno=0 status=ux
[all …]
/third_party/cmsis/CMSIS/Core/Include/a-profile/
Dcmsis_iccarm_a.h249 #define __get_CP(cp, op1, RT, CRn, CRm, op2) \ argument
250 ((RT) = __arm_rsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2))
252 #define __set_CP(cp, op1, RT, CRn, CRm, op2) \ argument
253 (__arm_wsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2, (RT)))
255 #define __get_CP64(cp, op1, Rt, CRm) \ argument
256 __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
258 #define __set_CP64(cp, op1, Rt, CRm) \ argument
259 __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
415 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
417 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); in __ROR()
[all …]
Dcmsis_clang_a.h230 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
235 return op1; in __ROR()
237 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
684 __STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate) in __SXTB16_RORn() argument
689 __ASM volatile("sxtb16 %0, %1, ROR %2" : "=r"(result) : "r"(op1), "i"(rotate)); in __SXTB16_RORn()
693 result = __SXTB16(__ROR(op1, rotate)); in __SXTB16_RORn()
698 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn() argument
703 … __ASM volatile("sxtab16 %0, %1, %2, ROR %3" : "=r"(result) : "r"(op1), "r"(op2), "i"(rotate)); in __SXTAB16_RORn()
707 result = __SXTAB16(op1, __ROR(op2, rotate)); in __SXTAB16_RORn()
712 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument
[all …]
Dcmsis_gcc_a.h237 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
242 return op1; in __ROR()
244 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
707 __STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate) in __SXTB16_RORn() argument
712 __ASM volatile("sxtb16 %0, %1, ROR %2" : "=r"(result) : "r"(op1), "i"(rotate)); in __SXTB16_RORn()
716 result = __SXTB16(__ROR(op1, rotate)); in __SXTB16_RORn()
721 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn() argument
726 … __ASM volatile("sxtab16 %0, %1, %2, ROR %3" : "=r"(result) : "r"(op1), "r"(op2), "i"(rotate)); in __SXTAB16_RORn()
730 result = __SXTAB16(op1, __ROR(op2, rotate)); in __SXTAB16_RORn()
735 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument
[all …]
Dcmsis_armclang_a.h192 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
197 return op1; in __ROR()
199 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
502 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument
506 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); in __SMMLA()
698 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
699 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn… argument
700 #define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c… argument
701 #define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c… argument
/third_party/node/deps/v8/src/diagnostics/arm/
Ddisasm-arm.cc1888 int op1 = instr->Bits(11, 9); in DecodeSpecialCondition() local
1894 ((op1 >> 1) == 0b10) && !op2) { in DecodeSpecialCondition()
1904 int op1 = instr->Bits(19, 16); in DecodeFloatingPointDataProcessing() local
1959 } else if (instr->Opc1Value() == 0x7 && (op1 >> 3) && op2 && op3) { in DecodeFloatingPointDataProcessing()
2006 int op1 = instr->Bit(20); in DecodeUnconditional() local
2015 } else if ((op0 & 0b10) == 0b10 && op1) { in DecodeUnconditional()
2017 } else if (op0 == 0b10 && !op1) { in DecodeUnconditional()
2026 int op1 = instr->Bit(4); in DecodeAdvancedSIMDDataProcessing() local
2043 if (!u && opc == 0 && op1) { in DecodeAdvancedSIMDDataProcessing()
2045 } else if (!u && opc == 1 && sz == 2 && q && op1) { in DecodeAdvancedSIMDDataProcessing()
[all …]
/third_party/node/deps/v8/src/codegen/s390/
Dassembler-s390-inl.h256 Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc)); in target_address_at() local
260 if (BRASL == op1 || BRCL == op1) { in target_address_at()
273 if (IIHF == op1 && IILF == op2) { in target_address_at()
279 if (IILF == op1 || CFI == op1) { in target_address_at()
318 Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc)); in set_target_address_at() local
323 if (BRASL == op1 || BRCL == op1) { in set_target_address_at()
343 if (IIHF == op1 && IILF == op2) { in set_target_address_at()
366 if (IILF == op1 || CFI == op1) { in set_target_address_at()
/third_party/skia/third_party/externals/freetype/src/psaux/
Dpsintrp.c506 FT_Byte op1; /* first opcode byte */ in cf2_interpT2CharString() local
636 op1 = cf2_cmdRETURN; /* end of buffer for subroutine */ in cf2_interpT2CharString()
638 op1 = cf2_cmdENDCHAR; /* end of buffer for top level charstring */ in cf2_interpT2CharString()
642 op1 = (FT_Byte)cf2_buf_readByte( charstring ); in cf2_interpT2CharString()
646 if ( ( op1 == cf2_cmdRETURN || op1 == cf2_cmdENDCHAR ) && in cf2_interpT2CharString()
648 op1 = cf2_cmdRESERVED_0; in cf2_interpT2CharString()
654 !( op1 == cf2_cmdHSTEM || in cf2_interpT2CharString()
655 op1 == cf2_cmdVSTEM || in cf2_interpT2CharString()
656 op1 == cf2_cmdHSBW || in cf2_interpT2CharString()
657 op1 == cf2_cmdCALLSUBR || in cf2_interpT2CharString()
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/third_party/mesa3d/src/intel/compiler/
Dbrw_nir_lower_conversions.c54 split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2) in split_conversion() argument
59 nir_ssa_def *tmp = nir_build_alu(b, op1, src, NULL, NULL, NULL); in split_conversion()
91 nir_op op1 = get_conversion_op(src_type, src_bit_size, in lower_alu_instr() local
97 split_conversion(b, alu, op1, op2); in lower_alu_instr()
117 nir_op op1 = get_conversion_op(src_type, src_bit_size, dst_type, 32, in lower_alu_instr() local
121 split_conversion(b, alu, op1, op2); in lower_alu_instr()
/third_party/mesa3d/src/panfrost/midgard/
Dmidgard_address.c98 nir_ssa_scalar op1 = nir_ssa_scalar_chase_alu_src(address->B, 0); in mir_match_iadd() local
101 if (nir_ssa_scalar_is_const(op1) && in mir_match_iadd()
102 nir_ssa_scalar_as_uint(op1) <= MAX_POSITIVE_OFFSET) { in mir_match_iadd()
103 address->bias += nir_ssa_scalar_as_uint(op1); in mir_match_iadd()
108 address->B = op1; in mir_match_iadd()
109 } else if (!nir_ssa_scalar_is_const(op1) && in mir_match_iadd()
112 address->A = op1; in mir_match_iadd()
168 nir_ssa_scalar op1 = nir_ssa_scalar_chase_alu_src(address->B, 0); in mir_match_ishl() local
176 address->B = op1; in mir_match_ishl()
/third_party/cmsis/CMSIS/Core/Include/m-profile/
Dcmsis_gcc_m.h330 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
335 return op1; in __ROR()
337 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1630 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) in __SXTB16() argument
1634 __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __SXTB16()
1638 __STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate) in __SXTB16_RORn() argument
1643 __ASM volatile("sxtb16 %0, %1, ROR %2" : "=r"(result) : "r"(op1), "i"(rotate)); in __SXTB16_RORn()
1647 result = __SXTB16(__ROR(op1, rotate)); in __SXTB16_RORn()
1652 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) in __SXTAB16() argument
1656 __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SXTAB16()
[all …]

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