Searched refs:param_base (Results 1 – 3 of 3) sorted by relevance
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_vec4_nir.cpp | 444 int param_base = inst->base_mrf; in nir_emit_intrinsic() local
446 emit(MOV(dst_reg(MRF, param_base, glsl_type::int_type, writemask), lod)); in nir_emit_intrinsic()
2150 int param_base = inst->base_mrf + inst->header_size; in nir_emit_texture() local
2154 emit(MOV(dst_reg(MRF, param_base, lod.type, writemask), lod)); in nir_emit_texture()
2164 emit(MOV(dst_reg(MRF, param_base, coordinate.type, coord_mask), in nir_emit_texture()
2169 emit(MOV(dst_reg(MRF, param_base, coordinate.type, zero_mask), in nir_emit_texture()
2176 emit(MOV(dst_reg(MRF, param_base + 1, shadow_comparator.type, in nir_emit_texture()
2187 mrf = param_base + 1; in nir_emit_texture()
2196 mrf = param_base; in nir_emit_texture()
2204 emit(MOV(dst_reg(MRF, param_base, lod.type, WRITEMASK_W), lod)); in nir_emit_texture()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_nir_lower_tess_io.cpp | 110 r600_tcs_base_address(nir_builder *b, nir_ssa_def *param_base, nir_ssa_def *rel_patch_id) in r600_tcs_base_address() argument
112 return r600_umad_24(b, nir_channel(b, param_base, 0), in r600_tcs_base_address()
114 nir_channel(b, param_base, 3)); in r600_tcs_base_address()
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| /third_party/node/deps/v8/src/wasm/baseline/ |
| D | liftoff-assembler.cc | 1044 uint32_t param_base = cache_state_.stack_height() - num_params; in PrepareCall() local
1046 &cache_state_.stack_state[param_base], &stack_slots, in PrepareCall()
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