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Searched refs:pipeConfig (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/r800/
Dsiaddrlib.cpp147 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); in HwlGetPipes()
168 AddrPipeCfg pipeConfig ///< [in] pipe config in GetPipePerSurf()
173 switch (pipeConfig) in GetPipePerSurf()
424 ((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || in ComputeBankEquation()
425 (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32))) in ComputeBankEquation()
476 switch (pTileInfo->pipeConfig) in ComputePipeEquation()
693 switch (pTileInfo->pipeConfig) in ComputePipeFromCoord()
1085 AddrPipeCfg pipeConfig, ///< [in] pipe config in TileCoordToMaskElementIndex() argument
1100 switch(pipeConfig) in TileCoordToMaskElementIndex()
1237 if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) || in HwlComputeTileDataWidthAndHeightLinear()
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Dciaddrlib.cpp528 (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) in HwlPostCheckTileIndex()
535 if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && in HwlPostCheckTileIndex()
616 pInfo->pipeConfig = ADDR_PIPECFG_P2; in HwlSetupTileCfg()
661 pInfo->pipeConfig = pCfgTable->info.pipeConfig; in HwlSetupTileCfg()
1498 tileInfo.pipeConfig = m_tileTable[index].info.pipeConfig; in HwlSetupTileInfo()
1533 UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); in HwlSetupTileInfo()
1591 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.alt_pipe_config + 1); in ReadGbTileMode()
1595 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1); in ReadGbTileMode()
1879 pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; in HwlComputeMacroModeIndex()
1919 switch (pTileInfo->pipeConfig) in HwlComputeTileDataWidthAndHeightLinear()
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Dsiaddrlib.h290 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig,
302 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const;
Degbaddrlib.cpp3493 (pTileInfo->pipeConfig != 0) in IsTileInfoAllZero()
3788 pTileInfoOut->pipeConfig = pTileInfoIn->pipeConfig; in HwlConvertTileInfoToHW()
/third_party/libdrm/tests/tegra/
Dvic40.h277 PipeConfig pipeConfig; member
Dvic41.h356 PipeConfig pipeConfig; member
Dvic42.h573 PipeConfig pipeConfig; member
/third_party/mesa3d/src/amd/addrlib/inc/
Daddrinterface.h148 UINT_32 pipeConfig : 5; ///< pipe config member
458 AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1 member
/third_party/mesa3d/src/amd/common/
Dac_surface.c909 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1; in gfx6_surface_settings()
1180 AddrTileInfoIn.pipeConfig = surf->u.legacy.pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in gfx6_compute_surface()