| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | evergreen_hw_context.c | 40 struct r600_resource *rdst = (struct r600_resource*)dst; in evergreen_dma_copy_buffer() local
46 util_range_add(&rdst->b.b, &rdst->valid_buffer_range, dst_offset, in evergreen_dma_copy_buffer()
49 dst_offset += rdst->gpu_address; in evergreen_dma_copy_buffer()
63 r600_need_dma_space(&rctx->b, ncopy * 5, rdst, rsrc); in evergreen_dma_copy_buffer()
68 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE); in evergreen_dma_copy_buffer()
|
| D | r600_buffer_common.c | 249 struct r600_resource *rdst = r600_resource(dst); in r600_replace_buffer_storage() local
251 uint64_t old_gpu_address = rdst->gpu_address; in r600_replace_buffer_storage()
253 pb_reference(&rdst->buf, rsrc->buf); in r600_replace_buffer_storage()
254 rdst->gpu_address = rsrc->gpu_address; in r600_replace_buffer_storage()
255 rdst->b.b.bind = rsrc->b.b.bind; in r600_replace_buffer_storage()
256 rdst->flags = rsrc->flags; in r600_replace_buffer_storage()
258 assert(rdst->vram_usage == rsrc->vram_usage); in r600_replace_buffer_storage()
259 assert(rdst->gart_usage == rsrc->gart_usage); in r600_replace_buffer_storage()
260 assert(rdst->bo_size == rsrc->bo_size); in r600_replace_buffer_storage()
261 assert(rdst->bo_alignment == rsrc->bo_alignment); in r600_replace_buffer_storage()
[all …]
|
| D | r600_test_dma.c | 207 struct r600_texture *rdst; in r600_test_dma() local
277 rdst = (struct r600_texture*)dst; in r600_test_dma()
285 array_mode_to_string(rscreen, &rdst->surface), in r600_test_dma()
294 rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true); in r600_test_dma()
325 !rdst->surface.is_linear && in r600_test_dma()
353 !rdst->surface.is_linear && in r600_test_dma()
|
| D | r600_hw_context.c | 588 struct r600_resource *rdst = (struct r600_resource*)dst; in r600_dma_copy_buffer() local
594 util_range_add(&rdst->b.b, &rdst->valid_buffer_range, dst_offset, in r600_dma_copy_buffer()
600 r600_need_dma_space(&rctx->b, ncopy * 5, rdst, rsrc); in r600_dma_copy_buffer()
605 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE); in r600_dma_copy_buffer()
|
| D | r600_state.c | 2867 struct r600_texture *rdst = (struct r600_texture*)dst; in r600_dma_copy_tile() local
2872 dst_mode = rdst->surface.u.legacy.level[dst_level].mode; in r600_dma_copy_tile()
2896 addr = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256; in r600_dma_copy_tile()
2897 addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z; in r600_dma_copy_tile()
2902 …slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[ds… in r600_dma_copy_tile()
2909 height = u_minify(rdst->resource.b.b.height0, dst_level); in r600_dma_copy_tile()
2914 base = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256; in r600_dma_copy_tile()
2929 r600_need_dma_space(&rctx->b, ncopy * 7, &rdst->resource, &rsrc->resource); in r600_dma_copy_tile()
2936 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE); in r600_dma_copy_tile()
2963 struct r600_texture *rdst = (struct r600_texture*)dst; in r600_dma_copy() local
[all …]
|
| D | evergreen_state.c | 3781 struct r600_texture *rdst = (struct r600_texture*)dst; in evergreen_dma_copy_tile() local
3787 dst_mode = rdst->surface.u.legacy.level[dst_level].mode; in evergreen_dma_copy_tile()
3817 addr = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256; in evergreen_dma_copy_tile()
3818 addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z; in evergreen_dma_copy_tile()
3825 addr += rdst->resource.gpu_address; in evergreen_dma_copy_tile()
3829 …slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[ds… in evergreen_dma_copy_tile()
3836 height = u_minify(rdst->resource.b.b.height0, dst_level); in evergreen_dma_copy_tile()
3841 base = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256; in evergreen_dma_copy_tile()
3845 bank_h = eg_bank_wh(rdst->surface.u.legacy.bankh); in evergreen_dma_copy_tile()
3846 bank_w = eg_bank_wh(rdst->surface.u.legacy.bankw); in evergreen_dma_copy_tile()
[all …]
|
| D | r600_pipe_common.c | 1075 struct r600_multi_fence **rdst = (struct r600_multi_fence **)dst; in r600_fence_reference() local
1078 if (pipe_reference(&(*rdst)->reference, &rsrc->reference)) { in r600_fence_reference()
1079 ws->fence_reference(&(*rdst)->gfx, NULL); in r600_fence_reference()
1080 ws->fence_reference(&(*rdst)->sdma, NULL); in r600_fence_reference()
1081 FREE(*rdst); in r600_fence_reference()
1083 *rdst = rsrc; in r600_fence_reference()
|
| D | r600_texture.c | 48 struct r600_texture *rdst, in r600_prepare_for_dma_blit() argument
58 if (rdst->surface.bpe != rsrc->surface.bpe) in r600_prepare_for_dma_blit()
63 rdst->resource.b.b.nr_samples > 1) in r600_prepare_for_dma_blit()
70 if (rsrc->is_depth || rdst->is_depth) in r600_prepare_for_dma_blit()
78 if (rdst->cmask.size && rdst->dirty_level_mask & (1 << dst_level)) { in r600_prepare_for_dma_blit()
81 if (!util_texrange_covers_whole_level(&rdst->resource.b.b, dst_level, in r600_prepare_for_dma_blit()
86 r600_texture_discard_cmask(rctx->screen, rdst); in r600_prepare_for_dma_blit()
94 assert(!(rdst->dirty_level_mask & (1 << dst_level))); in r600_prepare_for_dma_blit()
|
| D | r600_blit.c | 617 struct r600_resource_global *rdst = in r600_copy_global_buffer() local
619 struct compute_memory_item *item = rdst->chunk; in r600_copy_global_buffer()
914 struct r600_texture *rdst = (struct r600_texture *)info->dst.resource; in r600_blit() local
926 if (rdst->surface.u.legacy.level[info->dst.level].mode == in r600_blit()
|
| D | r600_pipe_common.h | 744 struct r600_texture *rdst,
|
| /third_party/ffmpeg/libavfilter/ |
| D | af_virtualbass.c | 102 double *rdst = (double *)out->extended_data[1]; in vb_stereo() local
115 memcpy(rdst, rsrc, in->nb_samples * sizeof(double)); in vb_stereo()
|
| /third_party/toybox/toys/pending/ |
| D | ip.c | 1498 struct I_data rvia, rdst, mdst, rsrc, msrc; member
1601 if (gfilter.rdst.family && (msg->rtm_family != gfilter.rdst.family || in display_route_info()
1602 gfilter.rdst.netmask > msg->rtm_dst_len)) return 0; in display_route_info()
1619 if (gfilter.rdst.family && in display_route_info()
1620 memcmp(RTA_DATA(attr[RTA_DST]), &gfilter.rdst.addr, gfilter.rdst.len)) in display_route_info()
1954 parse_prefix(gfilter.rdst.addr, &gfilter.rdst.netmask, in route_show_flush()
1955 &gfilter.rdst.len, *argv, gfilter.rdst.family); in route_show_flush()
1956 if (gfilter.rdst.len) in route_show_flush()
1957 gfilter.rdst.family = ((gfilter.rdst.len == 4) ? in route_show_flush()
1967 if (idx != 11) gfilter.rdst = gfilter.mdst; in route_show_flush()
|
| /third_party/mesa3d/src/gallium/frontends/nine/ |
| D | nine_shader.c | 1414 struct ureg_dst rdst; in tx_apply_dst0_modifiers() local
1419 rdst = _tx_dst_param(tx, &tx->insn.dst[0]); in tx_apply_dst0_modifiers()
1421 assert(rdst.File != TGSI_FILE_ADDRESS); /* this probably isn't possible */ in tx_apply_dst0_modifiers()
1428 ureg_MUL(tx->ureg, rdst, ureg_src(tx->regs.tdst), ureg_imm1f(tx->ureg, f)); in tx_apply_dst0_modifiers()
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 19.0.0.rst | 1806 - winsys/amdgpu: rename rfence, rsrc, rdst -> afence, asrc, adst
1810 - radeonsi: rename rsrc -> ssrc, rdst -> sdst
|