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Searched refs:reg_b (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/amd/compiler/tests/
Dtest_to_hw_instr.cpp39 v0_hi.reg_b += 2;
40 v1_hi.reg_b += 2;
41 v0_b1.reg_b += 1;
42 v1_b1.reg_b += 1;
43 v0_b3.reg_b += 3;
44 v1_b3.reg_b += 3;
417 v0_hi.reg_b += 2;
418 v0_b1.reg_b += 1;
419 v1_hi.reg_b += 2;
796 v0_b3.reg_b += 3;
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/third_party/ffmpeg/libavcodec/arm/
Dcabac.h34 void *reg_b, *reg_c, *tmp; in get_cabac_inline_arm() local
90 [r_b]"=&r"(reg_b), in get_cabac_inline_arm()
/third_party/ffmpeg/libavcodec/aarch64/
Dcabac.h34 void *reg_a, *reg_b, *reg_c, *tmp; in get_cabac_inline_aarch64() local
85 [r_b]"=&r"(reg_b), in get_cabac_inline_aarch64()
/third_party/mesa3d/src/amd/compiler/
Daco_lower_to_hw_instr.cpp976 def_reg.reg_b += offset; in split_copy()
977 op_reg.reg_b += offset; in split_copy()
988 bool can_increase = def_reg.reg_b % MIN2(next, max_align) == 0 && in split_copy()
991 can_increase = op_reg.reg_b % MIN2(next, max_align) == 0; in split_copy()
1311 op_half.reg_b &= ~1; in swap_subdword_gfx11()
1314 def_other_half.reg_b &= ~1; in swap_subdword_gfx11()
1315 def_other_half.reg_b ^= 2; in swap_subdword_gfx11()
1332 if (copy.bytes == 3 && (copy.def.physReg().reg_b % 4 <= 1) && in do_swap()
1333 (copy.def.physReg().reg_b % 4) == (copy.op.physReg().reg_b % 4)) { in do_swap()
1338 op.reg_b &= ~0x3; in do_swap()
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Daco_validate.cpp954 if (regs[reg.reg_b + j]) in validate_instr_defs()
956 ra_fail(program, loc, assignments[regs[reg.reg_b + j]].defloc, in validate_instr_defs()
958 tmp.id(), regs[reg.reg_b + j]); in validate_instr_defs()
959 regs[reg.reg_b + j] = tmp.id(); in validate_instr_defs()
981 regs[def.physReg().reg_b + j] = 0; in validate_instr_defs()
1027 op.physReg().reg_b + op.bytes() > (256 + program->config->num_vgprs) * 4) || in validate_ra()
1058 def.physReg().reg_b + def.bytes() > (256 + program->config->num_vgprs) * 4) || in validate_ra()
1096 if (regs[reg.reg_b + i]) { in validate_ra()
1099 i, id, regs[reg.reg_b + i]); in validate_ra()
1101 regs[reg.reg_b + i] = id; in validate_ra()
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Daco_register_allocation.cpp117 reg.reg_b += 4; in operator ++()
123 reg.reg_b -= 4; in operator --()
272 for (PhysReg i = start; i.reg_b < start.reg_b + num_bytes; i = PhysReg(i + 1)) { in test()
278 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++) { in test()
360 for (PhysReg i = start; i.reg_b < start.reg_b + num_bytes; i = PhysReg(i + 1)) { in fill_subdword()
364 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++) in fill_subdword()
981 res.reg_b += i; in get_reg_simple()
1053 reg.reg_b += instr->operands[i].bytes(); in get_reg_for_create_vector_copy()
1066 reg.reg_b += instr->operands[i].bytes(); in get_reg_for_create_vector_copy()
1414 test_reg.reg_b = reg.reg_b & ~(sdw_def_info.second - 1); in get_reg_specified()
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Daco_ir.h435 explicit constexpr PhysReg(unsigned r) : reg_b(r << 2) {} in PhysReg()
436 constexpr unsigned reg() const { return reg_b >> 2; } in reg()
437 constexpr unsigned byte() const { return reg_b & 0x3; } in byte()
439 constexpr bool operator==(PhysReg other) const { return reg_b == other.reg_b; }
440 constexpr bool operator!=(PhysReg other) const { return reg_b != other.reg_b; }
441 constexpr bool operator<(PhysReg other) const { return reg_b < other.reg_b; }
445 res.reg_b += bytes; in advance()
449 uint16_t reg_b = 0; member
/third_party/ffmpeg/libavcodec/x86/
Dvp9itxfm_16bpp.asm520 pmaddwd m7, m2, reg_b
528 pmaddwd m7, m1, reg_b
543 pmaddwd m1, m7, reg_b