Searched refs:reg_undef (Results 1 – 8 of 8) sorted by relevance
/third_party/mesa3d/src/intel/compiler/ |
D | brw_fs_visitor.cpp | 727 const fs_reg srcs[] = { reg_undef, reg_undef, in emit_fb_writes() 728 reg_undef, offset(this->outputs[0], bld, 3) }; in emit_fb_writes() 732 inst = emit_single_fb_write(bld, tmp, reg_undef, reg_undef, 4); in emit_fb_writes() 945 fs_inst *inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in emit_urb_writes() 990 fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in emit_urb_writes() 1042 reg_undef, srcs, ARRAY_SIZE(srcs)); in emit_urb_writes() 1082 .emit(CS_OPCODE_CS_TERMINATE, reg_undef, payload); in emit_cs_terminate() 1130 bld.exec_all().emit(SHADER_OPCODE_BARRIER, reg_undef, payload); in emit_barrier()
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D | brw_fs_register_coalesce.cpp | 285 mov[i]->dst = reg_undef; in register_coalesce() 287 mov[i]->src[j] = reg_undef; in register_coalesce()
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D | brw_mesh.cpp | 902 payload_srcs[length++] = reg_undef; in emit_urb_direct_writes() 915 reg_undef, srcs, ARRAY_SIZE(srcs)); in emit_urb_direct_writes() 943 reg_undef, srcs, ARRAY_SIZE(srcs)); in emit_urb_direct_writes() 1009 reg_undef, srcs, ARRAY_SIZE(srcs)); in emit_urb_indirect_writes()
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D | brw_fs.cpp | 100 init(opcode, exec_size, reg_undef, NULL, 0); in fs_inst() 1550 inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in emit_gs_thread_end() 1557 inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in emit_gs_thread_end() 2617 inst->src[1] = reg_undef; in opt_algebraic() 2626 inst->src[1] = reg_undef; in opt_algebraic() 2639 inst->src[1] = reg_undef; in opt_algebraic() 2648 inst->src[1] = reg_undef; in opt_algebraic() 2666 inst->src[1] = reg_undef; in opt_algebraic() 2708 inst->src[1] = reg_undef; in opt_algebraic() 2720 inst->src[1] = reg_undef; in opt_algebraic() [all …]
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D | brw_fs_cse.cpp | 280 entry->tmp = reg_undef; in opt_cse_local()
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D | brw_ir_fs.h | 326 static const fs_reg reg_undef; variable
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D | brw_lower_logical_sends.cpp | 564 inst->src[0] = reg_undef; in lower_sampler_logical_send_gfx4() 658 inst->src[0] = reg_undef; in lower_sampler_logical_send_gfx5()
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D | brw_fs_nir.cpp | 2357 fs_inst *inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in emit_gs_control_data_bits() 3097 fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef, in nir_emit_tcs_intrinsic()
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