Searched refs:regs_read (Results 1 – 18 of 18) sorted by relevance
/third_party/mesa3d/src/intel/compiler/ |
D | brw_schedule_instructions.cpp | 790 for (unsigned j = 0; j < regs_read(inst, i); j++) in count_reads_remaining() 874 for (unsigned off = 0; off < regs_read(inst, i); off++) in update_register_pressure() 903 for (unsigned off = 0; off < regs_read(inst, i); off++) { in get_register_pressure_benefit() 1172 for (unsigned r = 0; r < regs_read(inst, i); r++) in calculate_deps() 1175 for (unsigned r = 0; r < regs_read(inst, i); r++) { in calculate_deps() 1182 for (unsigned r = 0; r < regs_read(inst, i); r++) in calculate_deps() 1301 for (unsigned r = 0; r < regs_read(inst, i); r++) in calculate_deps() 1304 for (unsigned r = 0; r < regs_read(inst, i); r++) { in calculate_deps() 1311 for (unsigned r = 0; r < regs_read(inst, i); r++) in calculate_deps() 1435 for (unsigned j = 0; j < regs_read(inst, i); ++j) in calculate_deps() [all …]
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D | brw_fs_validate.cpp | 67 fsv_assert(inst->src[i].offset / REG_SIZE + regs_read(inst, i) <= in validate()
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D | brw_fs_live_variables.cpp | 123 for (unsigned j = 0; j < regs_read(inst, i); j++) { in setup_def_use() 353 inst->src[i], regs_read(inst, i))) in validate()
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D | brw_fs_dead_code_eliminate.cpp | 133 for (unsigned j = 0; j < regs_read(inst, i); j++) { in dead_code_eliminate()
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D | brw_ir_performance.cpp | 1351 for (unsigned j = 0; j < regs_read(inst, i); j++) in issue_fs_inst() 1415 for (unsigned j = 0; j < regs_read(inst, i); j++) in issue_fs_inst() 1473 for (unsigned j = 0; j < regs_read(inst, i); j++) in issue_vec4_instruction() 1522 for (unsigned j = 0; j < regs_read(inst, i); j++) in issue_vec4_instruction()
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D | brw_fs_reg_allocate.cpp | 252 for (unsigned j = 0; j < regs_read(inst, i); j++) { in calculate_payload_ranges() 894 spill_costs[inst->src[i].nr] += regs_read(inst, i) * block_scale; in set_spill_costs() 1092 int count = regs_read(inst, i); in spill_reg()
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D | brw_vec4_live_variables.cpp | 284 regs_read(inst, i))) in validate()
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D | brw_ir_vec4.h | 432 regs_read(const vec4_instruction *inst, unsigned i) in regs_read() function
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D | brw_eu_validate.c | 1441 int regs_read = 0; in registers_read() local 1447 regs_read = 1; in registers_read() 1451 return regs_read; in registers_read()
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D | brw_fs_scoreboard.cpp | 1014 for (unsigned j = 0; j < regs_read(inst, i); j++) { in update_inst_scoreboard() 1135 for (unsigned j = 0; j < regs_read(inst, i); j++) in gather_inst_dependencies()
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D | brw_ir_fs.h | 461 regs_read(const fs_inst *inst, unsigned i) in regs_read() function
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D | brw_fs_bank_conflicts.cpp | 520 p.require_contiguous(reg_of(inst->src[i]), regs_read(inst, i)); in shader_reg_partitioning()
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D | brw_fs.cpp | 2192 for (unsigned j = 1; j < regs_read(inst, i); j++) in split_virtual_grfs() 3136 unsigned regs_left = (1 << regs_read(inst, 0)) - 1; in compute_to_mrf() 3227 regs_left = (1 << regs_read(inst, 0)) - 1; in compute_to_mrf()
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D | brw_vec4.cpp | 1265 if (inst->src[i].file == VGRF && regs_read(inst, i) > 1) in split_virtual_grfs()
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/third_party/mesa3d/docs/relnotes/ |
D | 10.6.4.rst | 75 - i965/fs: Fix fs_inst::regs_read() for sources in the ATTR file.
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D | 20.3.4.rst | 118 - intel/compiler: Return 1 for immediates in regs_read
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D | 21.0.0.rst | 1732 - intel/compiler: Return 1 for immediates in regs_read
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D | 21.1.0.rst | 2611 - intel/compiler: Return 1 for immediates in regs_read
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