/third_party/libwebsockets/lib/misc/ |
D | lws-ring.c | 31 struct lws_ring *ring = lws_malloc(sizeof(*ring), "ring create"); in lws_ring_create() local 33 if (!ring) in lws_ring_create() 36 ring->buflen = (uint32_t)(count * element_len); in lws_ring_create() 37 ring->element_len = (uint32_t)element_len; in lws_ring_create() 38 ring->head = 0; in lws_ring_create() 39 ring->oldest_tail = 0; in lws_ring_create() 40 ring->destroy_element = destroy_element; in lws_ring_create() 42 ring->buf = lws_malloc(ring->buflen, "ring buf"); in lws_ring_create() 43 if (!ring->buf) { in lws_ring_create() 44 lws_free(ring); in lws_ring_create() [all …]
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/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_emit.c | 51 emit_constants(struct fd_ringbuffer *ring, uint32_t base, in emit_constants() argument 87 OUT_PKT3(ring, CP_SET_CONSTANT, size + 1); in emit_constants() 88 OUT_RING(ring, base); in emit_constants() 90 OUT_RING(ring, *(dwords++)); in emit_constants() 99 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_constants() 100 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i))); in emit_constants() 101 OUT_RING(ring, shader->immediates[i].val[0]); in emit_constants() 102 OUT_RING(ring, shader->immediates[i].val[1]); in emit_constants() 103 OUT_RING(ring, shader->immediates[i].val[2]); in emit_constants() 104 OUT_RING(ring, shader->immediates[i].val[3]); in emit_constants() [all …]
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D | fd2_draw.c | 43 emit_cacheflush(struct fd_ringbuffer *ring) in emit_cacheflush() argument 48 OUT_PKT3(ring, CP_EVENT_WRITE, 1); in emit_cacheflush() 49 OUT_RING(ring, CACHE_FLUSH); in emit_cacheflush() 81 const struct pipe_draw_start_count_bias *draw, struct fd_ringbuffer *ring, in draw_impl() argument 84 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in draw_impl() 85 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in draw_impl() 86 OUT_RING(ring, info->index_size ? 0 : draw->start); in draw_impl() 88 OUT_PKT0(ring, REG_A2XX_TC_CNTL_STATUS, 1); in draw_impl() 89 OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE); in draw_impl() 100 OUT_PKT3(ring, CP_WAIT_REG_EQ, 4); in draw_impl() [all …]
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D | fd2_gmem.c | 91 struct fd_ringbuffer *ring = batch->tile_fini; in emit_gmem2mem_surf() local 104 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in emit_gmem2mem_surf() 105 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 106 OUT_RING(ring, A2XX_RB_COLOR_INFO_BASE(base) | in emit_gmem2mem_surf() 109 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_gmem2mem_surf() 110 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 111 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */ in emit_gmem2mem_surf() 112 OUT_RELOC(ring, rsc->bo, offset, 0, 0); /* RB_COPY_DEST_BASE */ in emit_gmem2mem_surf() 113 OUT_RING(ring, pitch >> 5); /* RB_COPY_DEST_PITCH */ in emit_gmem2mem_surf() 114 OUT_RING(ring, /* RB_COPY_DEST_INFO */ in emit_gmem2mem_surf() [all …]
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/third_party/libdrm/freedreno/ |
D | freedreno_ringbuffer.c | 39 struct fd_ringbuffer *ring; in fd_ringbuffer_new_flags() local 48 ring = pipe->funcs->ringbuffer_new(pipe, size, flags); in fd_ringbuffer_new_flags() 49 if (!ring) in fd_ringbuffer_new_flags() 52 ring->flags = flags; in fd_ringbuffer_new_flags() 53 ring->pipe = pipe; in fd_ringbuffer_new_flags() 54 ring->start = ring->funcs->hostptr(ring); in fd_ringbuffer_new_flags() 55 ring->end = &(ring->start[ring->size/4]); in fd_ringbuffer_new_flags() 57 ring->cur = ring->last_start = ring->start; in fd_ringbuffer_new_flags() 59 return ring; in fd_ringbuffer_new_flags() 74 drm_public void fd_ringbuffer_del(struct fd_ringbuffer *ring) in fd_ringbuffer_del() argument [all …]
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/third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 58 fd5_emit_const_user(struct fd_ringbuffer *ring, in fd5_emit_const_user() argument 62 emit_const_asserts(ring, v, regid, sizedwords); in fd5_emit_const_user() 64 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + sizedwords); in fd5_emit_const_user() 65 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid / 4) | in fd5_emit_const_user() 69 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const_user() 73 OUT_RING(ring, ((uint32_t *)dwords)[i]); in fd5_emit_const_user() 77 fd5_emit_const_bo(struct fd_ringbuffer *ring, in fd5_emit_const_bo() argument 86 emit_const_asserts(ring, v, regid, sizedwords); in fd5_emit_const_bo() 88 OUT_PKT7(ring, CP_LOAD_STATE4, 3); in fd5_emit_const_bo() [all …]
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D | fd5_gmem.c | 46 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 98 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); in emit_mrt() 100 ring, in emit_mrt() 107 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); in emit_mrt() 108 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); in emit_mrt() 110 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ in emit_mrt() 111 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ in emit_mrt() 113 OUT_RELOC(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */ in emit_mrt() 116 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); in emit_mrt() 117 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | in emit_mrt() [all …]
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D | fd5_compute.c | 37 cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v) in cs_program_emit() argument 49 OUT_PKT4(ring, REG_A5XX_SP_SP_CNTL, 1); in cs_program_emit() 50 OUT_RING(ring, 0x00000000); /* SP_SP_CNTL */ in cs_program_emit() 52 OUT_PKT4(ring, REG_A5XX_HLSQ_CONTROL_0_REG, 1); in cs_program_emit() 53 OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 57 OUT_PKT4(ring, REG_A5XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 58 OUT_RING(ring, in cs_program_emit() 66 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in cs_program_emit() 67 OUT_RING(ring, A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 71 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CNTL, 1); in cs_program_emit() [all …]
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D | fd5_emit.h | 112 fd5_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) assert_dt in fd5_cache_flush() argument 115 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); in fd5_cache_flush() 116 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ in fd5_cache_flush() 117 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ in fd5_cache_flush() 118 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ in fd5_cache_flush() 119 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ in fd5_cache_flush() 120 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ in fd5_cache_flush() 121 fd_wfi(batch, ring); in fd5_cache_flush() 125 fd5_set_render_mode(struct fd_context *ctx, struct fd_ringbuffer *ring, in fd5_set_render_mode() argument 129 emit_marker5(ring, 7); in fd5_set_render_mode() [all …]
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D | fd5_draw.c | 43 draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring, in draw_impl() argument 49 fd5_emit_state(ctx, ring, emit); in draw_impl() 52 fd5_emit_vertex_bufs(ring, emit); in draw_impl() 54 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 55 OUT_RING(ring, info->index_size ? emit->draw->index_bias in draw_impl() 57 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 60 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 65 fd5_draw_emit(ctx->batch, ring, primtype, in draw_impl() 138 struct fd_ringbuffer *ring = ctx->batch->draw; in fd5_draw_vbo() local [all …]
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D | fd5_blitter.c | 154 emit_setup(struct fd_ringbuffer *ring) in emit_setup() argument 156 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in emit_setup() 157 OUT_RING(ring, 0x00000008); in emit_setup() 159 OUT_PKT4(ring, REG_A5XX_RB_2D_BLIT_CNTL, 1); in emit_setup() 160 OUT_RING(ring, 0x86000000); /* RB_2D_BLIT_CNTL */ in emit_setup() 162 OUT_PKT4(ring, REG_A5XX_GRAS_2D_BLIT_CNTL, 1); in emit_setup() 163 OUT_RING(ring, 0x86000000); /* 2D_BLIT_CNTL */ in emit_setup() 165 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2184, 1); in emit_setup() 166 OUT_RING(ring, 0x00000009); /* UNKNOWN_2184 */ in emit_setup() 168 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_setup() [all …]
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/third_party/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_gmem.c | 59 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 122 OUT_PKT0(ring, REG_A3XX_RB_MRT_BUF_INFO(i), 2); in emit_mrt() 123 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 129 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base)); in emit_mrt() 131 OUT_RELOC(ring, rsc->bo, offset, 0, -1); in emit_mrt() 134 OUT_PKT0(ring, REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(i), 1); in emit_mrt() 135 OUT_RING(ring, COND((i < nr_bufs) && bufs[i], in emit_mrt() 179 struct fd_ringbuffer *ring = batch->gmem; in emit_binning_workaround() local 192 OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 2); in emit_binning_workaround() 193 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() [all …]
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D | fd3_emit.c | 60 fd3_emit_const_user(struct fd_ringbuffer *ring, in fd3_emit_const_user() argument 64 emit_const_asserts(ring, v, regid, sizedwords); in fd3_emit_const_user() 66 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sizedwords); in fd3_emit_const_user() 67 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid / 2) | in fd3_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_user() 74 OUT_RING(ring, dwords[i]); in fd3_emit_const_user() 78 fd3_emit_const_bo(struct fd_ringbuffer *ring, in fd3_emit_const_bo() argument 91 emit_const_asserts(ring, v, regid, sizedwords); in fd3_emit_const_bo() 93 OUT_PKT3(ring, CP_LOAD_STATE, 2); in fd3_emit_const_bo() 94 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(dst_off) | in fd3_emit_const_bo() [all …]
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/third_party/mesa3d/src/freedreno/drm/ |
D | freedreno_ringbuffer.h | 128 void (*grow)(struct fd_ringbuffer *ring, uint32_t size); 129 void (*emit_reloc)(struct fd_ringbuffer *ring, const struct fd_reloc *reloc); 130 uint32_t (*emit_reloc_ring)(struct fd_ringbuffer *ring, 132 uint32_t (*cmd_count)(struct fd_ringbuffer *ring); 133 bool (*check_size)(struct fd_ringbuffer *ring); 134 void (*destroy)(struct fd_ringbuffer *ring); 158 fd_ringbuffer_del(struct fd_ringbuffer *ring) in fd_ringbuffer_del() argument 160 if (!p_atomic_dec_zero(&ring->refcnt)) in fd_ringbuffer_del() 163 ring->funcs->destroy(ring); in fd_ringbuffer_del() 167 fd_ringbuffer_ref(struct fd_ringbuffer *ring) in fd_ringbuffer_ref() argument [all …]
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/third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_emit.c | 56 fd4_emit_const_user(struct fd_ringbuffer *ring, in fd4_emit_const_user() argument 60 emit_const_asserts(ring, v, regid, sizedwords); in fd4_emit_const_user() 62 OUT_PKT3(ring, CP_LOAD_STATE4, 2 + sizedwords); in fd4_emit_const_user() 63 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid / 4) | in fd4_emit_const_user() 67 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_user() 70 OUT_RING(ring, dwords[i]); in fd4_emit_const_user() 74 fd4_emit_const_bo(struct fd_ringbuffer *ring, in fd4_emit_const_bo() argument 83 emit_const_asserts(ring, v, regid, sizedwords); in fd4_emit_const_bo() 85 OUT_PKT3(ring, CP_LOAD_STATE4, 2); in fd4_emit_const_bo() 86 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(dst_off) | in fd4_emit_const_bo() [all …]
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D | fd4_gmem.c | 60 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 124 OUT_PKT0(ring, REG_A4XX_RB_MRT_BUF_INFO(i), 3); in emit_mrt() 125 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 131 OUT_RING(ring, base); in emit_mrt() 132 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride)); in emit_mrt() 134 OUT_RELOC(ring, rsc->bo, offset, 0, 0); in emit_mrt() 139 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0)); in emit_mrt() 172 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf() local 192 OUT_PKT0(ring, REG_A4XX_RB_COPY_CONTROL, 4); in emit_gmem2mem_surf() 193 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_gmem2mem_surf() [all …]
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D | fd4_compute.c | 37 cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v) in cs_program_emit() argument 50 OUT_PKT0(ring, REG_A4XX_SP_SP_CTRL_REG, 1); in cs_program_emit() 51 OUT_RING(ring, 0x00860010); /* SP_SP_CTRL_REG */ in cs_program_emit() 53 OUT_PKT0(ring, REG_A4XX_HLSQ_CONTROL_0_REG, 1); in cs_program_emit() 54 OUT_RING(ring, A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 58 OUT_PKT0(ring, REG_A4XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 59 OUT_RING(ring, A4XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 64 OUT_PKT0(ring, REG_A4XX_HLSQ_UPDATE_CONTROL, 1); in cs_program_emit() 65 OUT_RING(ring, 0x00000038); /* HLSQ_UPDATE_CONTROL */ in cs_program_emit() 67 OUT_PKT0(ring, REG_A4XX_HLSQ_CS_CONTROL_REG, 1); in cs_program_emit() [all …]
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/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
D | fd6_gmem.c | 56 fd6_emit_flag_reference(struct fd_ringbuffer *ring, struct fd_resource *rsc, in fd6_emit_flag_reference() argument 60 OUT_RELOC(ring, rsc->bo, fd_resource_ubwc_offset(rsc, level, layer), 0, in fd6_emit_flag_reference() 62 OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH( in fd6_emit_flag_reference() 67 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ in fd6_emit_flag_reference() 68 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ in fd6_emit_flag_reference() 69 OUT_RING(ring, 0x00000000); in fd6_emit_flag_reference() 74 emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, in emit_mrt() argument 127 ring, in emit_mrt() 135 OUT_REG(ring, A6XX_SP_FS_MRT_REG(i, .color_format = format, in emit_mrt() 138 OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3); in emit_mrt() [all …]
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D | fd6_blitter.c | 237 struct fd_ringbuffer *ring = batch->draw; in emit_setup() local 240 fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); in emit_setup() 241 fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); in emit_setup() 242 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false); in emit_setup() 243 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false); in emit_setup() 246 OUT_WFI5(ring); in emit_setup() 247 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1); in emit_setup() 248 OUT_RING(ring, A6XX_RB_CCU_CNTL_COLOR_OFFSET(screen->ccu_offset_bypass)); in emit_setup() 252 emit_blit_setup(struct fd_ringbuffer *ring, enum pipe_format pfmt, in emit_blit_setup() argument 271 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1); in emit_blit_setup() [all …]
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D | fd6_program.c | 44 fd6_emit_shader(struct fd_context *ctx, struct fd_ringbuffer *ring, in fd6_emit_shader() argument 102 fd_emit_string5(ring, name, strlen(name)); in fd6_emit_shader() 125 OUT_PKT4(ring, instrlen, 1); in fd6_emit_shader() 126 OUT_RING(ring, so->instrlen); in fd6_emit_shader() 128 OUT_PKT4(ring, first_exec_offset, 7); in fd6_emit_shader() 129 OUT_RING(ring, 0); /* SP_xS_OBJ_FIRST_EXEC_OFFSET */ in fd6_emit_shader() 130 OUT_RELOC(ring, so->bo, 0, 0, 0); /* SP_xS_OBJ_START_LO */ in fd6_emit_shader() 131 OUT_RING(ring, A6XX_SP_VS_PVT_MEM_PARAM_MEMSIZEPERITEM(per_fiber_size)); in fd6_emit_shader() 133 OUT_RELOC(ring, ctx->pvtmem[so->pvtmem_per_wave].bo, 0, 0, 0); in fd6_emit_shader() 135 OUT_RING(ring, 0); in fd6_emit_shader() [all …]
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D | fd6_compute.c | 42 cs_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, in cs_program_emit() argument 48 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD(.vs_state = true, .hs_state = true, in cs_program_emit() 53 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit() 54 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_CONSTLEN(v->constlen) | in cs_program_emit() 57 OUT_PKT4(ring, REG_A6XX_SP_CS_CONFIG, 2); in cs_program_emit() 58 OUT_RING(ring, A6XX_SP_CS_CONFIG_ENABLED | in cs_program_emit() 62 OUT_RING(ring, v->instrlen); /* SP_VS_INSTRLEN */ in cs_program_emit() 64 OUT_PKT4(ring, REG_A6XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 65 OUT_RING(ring, in cs_program_emit() 73 OUT_PKT4(ring, REG_A6XX_SP_CS_UNKNOWN_A9B1, 1); in cs_program_emit() [all …]
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D | fd6_draw.c | 46 draw_emit_xfb(struct fd_ringbuffer *ring, struct CP_DRAW_INDX_OFFSET_0 *draw0, in draw_emit_xfb() argument 59 OUT_PKT7(ring, CP_WAIT_FOR_ME, 0); in draw_emit_xfb() 61 OUT_PKT7(ring, CP_DRAW_AUTO, 6); in draw_emit_xfb() 62 OUT_RING(ring, pack_CP_DRAW_INDX_OFFSET_0(*draw0).value); in draw_emit_xfb() 63 OUT_RING(ring, info->instance_count); in draw_emit_xfb() 64 OUT_RELOC(ring, offset->bo, 0, 0, 0); in draw_emit_xfb() 66 ring, in draw_emit_xfb() 68 OUT_RING(ring, target->stride); in draw_emit_xfb() 72 draw_emit_indirect(struct fd_ringbuffer *ring, in draw_emit_indirect() argument 84 OUT_PKT(ring, CP_DRAW_INDX_INDIRECT, pack_CP_DRAW_INDX_OFFSET_0(*draw0), in draw_emit_indirect() [all …]
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/third_party/mesa3d/src/freedreno/computerator/ |
D | a4xx.c | 65 cs_program_emit(struct fd_ringbuffer *ring, struct kernel *kernel) in cs_program_emit() argument 72 OUT_PKT0(ring, REG_A4XX_UCHE_INVALIDATE0, 2); in cs_program_emit() 73 OUT_RING(ring, 0x00000000); in cs_program_emit() 74 OUT_RING(ring, 0x00000012); in cs_program_emit() 76 OUT_WFI(ring); in cs_program_emit() 78 OUT_PKT0(ring, REG_A4XX_SP_MODE_CONTROL, 1); in cs_program_emit() 79 OUT_RING(ring, 0x0000001e); in cs_program_emit() 81 OUT_PKT0(ring, REG_A4XX_TPL1_TP_MODE_CONTROL, 1); in cs_program_emit() 82 OUT_RING(ring, 0x00000038); in cs_program_emit() 84 OUT_PKT0(ring, REG_A4XX_TPL1_TP_FS_TEX_COUNT, 1); in cs_program_emit() [all …]
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D | a6xx.c | 113 cs_program_emit(struct fd_ringbuffer *ring, struct kernel *kernel) in cs_program_emit() argument 121 OUT_PKT4(ring, REG_A6XX_SP_MODE_CONTROL, 1); in cs_program_emit() 122 OUT_RING(ring, A6XX_SP_MODE_CONTROL_CONSTANT_DEMOTION_ENABLE | 4); in cs_program_emit() 124 OUT_PKT4(ring, REG_A6XX_SP_PERFCTR_ENABLE, 1); in cs_program_emit() 125 OUT_RING(ring, A6XX_SP_PERFCTR_ENABLE_CS); in cs_program_emit() 127 OUT_PKT4(ring, REG_A6XX_SP_FLOAT_CNTL, 1); in cs_program_emit() 128 OUT_RING(ring, 0); in cs_program_emit() 130 OUT_PKT4(ring, REG_A6XX_HLSQ_INVALIDATE_CMD, 1); in cs_program_emit() 132 ring, in cs_program_emit() 139 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit() [all …]
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/third_party/mesa3d/src/virtio/vulkan/ |
D | vn_ring.c | 16 vn_ring_load_head(const struct vn_ring *ring) in vn_ring_load_head() argument 21 return atomic_load_explicit(ring->shared.head, memory_order_acquire); in vn_ring_load_head() 25 vn_ring_store_tail(struct vn_ring *ring) in vn_ring_store_tail() argument 30 return atomic_store_explicit(ring->shared.tail, ring->cur, in vn_ring_store_tail() 35 vn_ring_load_status(const struct vn_ring *ring) in vn_ring_load_status() argument 38 return atomic_load_explicit(ring->shared.status, memory_order_seq_cst); in vn_ring_load_status() 42 vn_ring_write_buffer(struct vn_ring *ring, const void *data, uint32_t size) in vn_ring_write_buffer() argument 44 assert(ring->cur + size - vn_ring_load_head(ring) <= ring->buffer_size); in vn_ring_write_buffer() 46 const uint32_t offset = ring->cur & ring->buffer_mask; in vn_ring_write_buffer() 47 if (offset + size <= ring->buffer_size) { in vn_ring_write_buffer() [all …]
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