/third_party/ffmpeg/libavcodec/ |
D | faanidct.c | 54 FLOAT s04, d04, s17, d17, s26, d26, s53, d53; in p8idct() local 74 s26 = temp[2*x + i] + temp[6*x + i]; in p8idct() 77 d26-= s26; in p8idct() 82 os07= s04 + s26; in p8idct() 83 os34= s04 - s26; in p8idct()
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/third_party/ffmpeg/libavcodec/arm/ |
D | fmtconvert_vfp.S | 70 vcvt.f32.s32 s26, s26 113 vcvt.f32.s32 s26, s26 151 vcvt.f32.s32 s26, s26
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D | mdct_vfp.S | 136 TCOS_D1_HEAD .req d13 @ s26,s27 321 1: postrotation_innerloop_rolled tail, head, s24, s25, s26, s27, s20, 16, 0
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D | fft_vfp.S | 291 vadd.f s0, s26, s24 294 vsub.f s3, s26, s24
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/third_party/ffmpeg/libavutil/arm/ |
D | float_dsp_vfp.S | 143 vmul.f s26, s2, s10 155 vmls.f s26, s18, s22 203 vstmia DST0!, {s26-s27} 247 vstmia DST0!, {s26-s27} 313 vmulge.f32 s26, s17, s26 395 vsub.f s26, s2, s10 400 vstr d13, [BASE2, #8-16*1] @ s26,s27 427 vstr d13, [BASE2, #8-16*3] @ s26,s27 443 vstr d13, [BASE2, #8-16*2] @ s26,s27
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceRegistersARM32.def | 63 X(Reg_s26, 26, "s26", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s26, d13, q6)) \ 85 X(Reg_d13, 13, "d13", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d13, q6, s26, s27)) \ 113 …, 6, "q6", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q6, d12, d13, s24, s25, s26, s27)) \
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/third_party/vixl/test/aarch64/ |
D | test-assembler-fp-aarch64.cc | 2259 __ Fmov(s26, INT32_MIN); in TEST() 2279 __ Frint32x(s13, s26); in TEST() 2403 __ Fmov(s26, INT32_MIN); in TEST() 2423 __ Frint32z(s13, s26); in TEST() 2547 __ Fmov(s26, INT64_MIN); in TEST() 2568 __ Frint64x(s13, s26); in TEST() 2693 __ Fmov(s26, INT64_MIN); in TEST() 2714 __ Frint64z(s13, s26); in TEST() 2835 __ Fmov(s26, -0.0); in TEST() 2848 __ Frinta(s10, s26); in TEST() [all …]
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D | test-disasm-fp-aarch64.cc | 157 COMPARE(fmin(s25, s26, s27), "fmin s25, s26, s27"); in TEST() 320 COMPARE(scvtf(s26, x0), "scvtf s26, x0"); in TEST()
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D | test-trace-aarch64.cc | 409 __ facgt(s12, s26, s12); in GenerateTestSequenceFP() 493 __ fcvtpu(wzr, s26); in GenerateTestSequenceFP() 522 __ fdiv(s26, s5, s25); in GenerateTestSequenceFP() 550 __ fnmadd(s0, s18, s26, s18); in GenerateTestSequenceFP() 552 __ fnmsub(s29, s0, s11, s26); in GenerateTestSequenceFP() 594 __ scvtf(s26, x12, 38); in GenerateTestSequenceFP() 1259 __ mov(s26, v19.S(), 0); in GenerateTestSequenceNEON() 1572 __ sqdmull(d25, s2, s26); in GenerateTestSequenceNEON() 1610 __ sqrshl(s26, s18, s2); in GenerateTestSequenceNEON() 2357 __ uqshrn(h28, s26, 11); in GenerateTestSequenceNEON() [all …]
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D | test-api-aarch64.cc | 525 VIXL_CHECK(AreConsecutive(s26, s27, s28, s29)); in TEST() 1471 temps.Include(CPURegList(s24, s25, s26)); in TEST() 1507 temps.Exclude(CPURegList(s24, s25, s26)); in TEST()
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D | test-assembler-neon-aarch64.cc | 4563 __ Sqdmlsl(s26, h0, v1.H(), 7); in TEST() 5616 __ Sqneg(s26, s2); in TEST() 5700 __ Sqabs(s26, s2); in TEST() 8837 __ Uqshl(s26, s1, s2); in TEST() 8889 __ Sqshl(s26, s1, s2); in TEST() 8997 __ Uqrshl(s26, s1, s2); in TEST() 9049 __ Sqrshl(s26, s1, s2); in TEST()
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D | test-disasm-aarch64.cc | 1424 COMPARE(ldp(s26, s27, MemOperand(x28, 252, PreIndex)), in TEST() 1489 COMPARE(stp(s26, s27, MemOperand(x28, 252, PreIndex)), in TEST()
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D | test-assembler-aarch64.cc | 3993 __ ldr(s26, &after_s); in TEST() 4026 ASSERT_EQUAL_FP32(2.5, s26); in TEST() 4080 __ ldr(s26, &after_s); in TEST() 4112 ASSERT_EQUAL_FP32(2.5, s26); in TEST() 4405 __ ldr(s26, &after_s); in TEST() 4435 ASSERT_EQUAL_FP32(2.5, s26); in TEST()
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/third_party/node/deps/v8/src/execution/arm/ |
D | simulator-arm.h | 110 s26, enumerator
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/third_party/node/deps/v8/src/codegen/arm/ |
D | register-arm.h | 26 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31)
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/third_party/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 [all …]
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D | log-disasm | 330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 [all …]
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D | log-cpufeatures-custom | 329 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 ### {FP, NEON} ### 413 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 ### {FP} ### 442 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 ### {FP} ### 470 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 ### {FP} ### 472 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 ### {FP} ### 514 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 ### {FP} ### 1022 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] ### {NEON} ### 1335 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 ### {NEON} ### 1373 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 ### {NEON} ### 2011 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 ### {NEON} ### [all …]
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D | log-cpufeatures-colour | 329 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 [1;35mFP, NEON[0;m 413 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 [1;35mFP[0;m 442 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 [1;35mFP[0;m 470 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 [1;35mFP[0;m 472 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 [1;35mFP[0;m 514 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 [1;35mFP[0;m 1022 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] [1;35mNEON[0;m 1335 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 [1;35mNEON[0;m 1373 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 [1;35mNEON[0;m 2011 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 [1;35mNEON[0;m [all …]
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D | log-cpufeatures | 329 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 // Needs: FP, NEON 413 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 // Needs: FP 442 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 // Needs: FP 470 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 // Needs: FP 472 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 // Needs: FP 514 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 // Needs: FP 1022 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] // Needs: NEON 1335 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 // Needs: NEON 1373 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 // Needs: NEON 2011 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 // Needs: NEON [all …]
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D | log-all | 1063 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 1231 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 1288 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 1289 # s26: 0x00000000 (0.000) 1344 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 1348 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 1432 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1433 # s26: 0x3c7fffff 5026 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] 5652 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 [all …]
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/third_party/node/deps/v8/src/codegen/arm64/ |
D | register-arm64.h | 52 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31)
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 113 def S26 : ARMFReg<26, "s26">; def S27 : ARMFReg<27, "s27">;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 344 def S26 : AArch64Reg<26, "s26", [H26]>, DwarfRegAlias<B26>;
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/third_party/vixl/test/aarch32/ |
D | test-assembler-aarch32.cc | 3371 temps.Include(s26); in TEST() 3390 VIXL_CHECK(temps.IsAvailable(s26)); in TEST()
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