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Searched refs:second_output (Results 1 – 4 of 4) sorted by relevance

/third_party/node/deps/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc1082 Register second_output = in AssembleArchInstruction() local
1085 __ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1090 __ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1095 Register second_output = in AssembleArchInstruction() local
1098 __ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1103 __ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1108 Register second_output = in AssembleArchInstruction() local
1111 __ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1116 __ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1866 Register second_output = instr->OutputCount() == 2 in AssembleArchInstruction() local
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/third_party/node/deps/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc1270 Register second_output = in AssembleArchInstruction() local
1273 __ ShiftLeftPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1276 __ ShiftLeftPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1282 Register second_output = in AssembleArchInstruction() local
1285 __ ShiftRightPair(i.OutputRegister(0), second_output, in AssembleArchInstruction()
1289 __ ShiftRightPair(i.OutputRegister(0), second_output, in AssembleArchInstruction()
1296 Register second_output = in AssembleArchInstruction() local
1299 __ ShiftRightAlgPair(i.OutputRegister(0), second_output, in AssembleArchInstruction()
1303 __ ShiftRightAlgPair(i.OutputRegister(0), second_output, in AssembleArchInstruction()
/third_party/node/deps/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc1256 Register second_output = in AssembleArchInstruction() local
1259 __ LslPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1262 __ LslPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1268 Register second_output = in AssembleArchInstruction() local
1271 __ LsrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1274 __ LsrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1280 Register second_output = in AssembleArchInstruction() local
1283 __ AsrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
1286 __ AsrPair(i.OutputRegister(0), second_output, i.InputRegister(0), in AssembleArchInstruction()
/third_party/node/deps/v8/src/compiler/backend/
Dregister-allocator.cc1823 UnallocatedOperand* second_output = UnallocatedOperand::cast(output); in MeetConstraintsBefore() local
1824 if (!second_output->HasSameAsInputPolicy()) continue; in MeetConstraintsBefore()
1827 UnallocatedOperand::cast(second->InputAt(second_output->input_index())); in MeetConstraintsBefore()
1828 int output_vreg = second_output->virtual_register(); in MeetConstraintsBefore()
1833 UnallocatedOperand(*cur_input, second_output->virtual_register()); in MeetConstraintsBefore()