Searched refs:shift_op (Results 1 – 8 of 8) sorted by relevance
| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 5282 Shift shift_op = NO_SHIFT; in Simulator() local
5337 shift_op = LSL; in Simulator()
5341 shift_op = LSR; in Simulator()
5345 shift_op = ASR; in Simulator()
5349 shift_op = ROR; in Simulator()
5413 if (shift_op != NO_SHIFT) { in Simulator()
5420 shift_op, in Simulator()
9486 Shift shift_op = NO_SHIFT; in Simulator() local
9489 shift_op = ASR; in Simulator()
9493 shift_op = ASR; in Simulator()
[all …]
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| D | logic-aarch64.cc | 7060 LogicVRegister Simulator::SVEBitwiseShiftHelper(Shift shift_op, in SVEBitwiseShiftHelper() argument
7084 shift_op, in SVEBitwiseShiftHelper()
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| D | simulator-aarch64.h | 4625 LogicVRegister SVEBitwiseShiftHelper(Shift shift_op,
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | assembler-arm.h | 102 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
116 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
170 ShiftOp shift_op() const { return shift_op_; } in shift_op() function
207 explicit MemOperand(Register rn, Register rm, ShiftOp shift_op, int shift_imm,
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| D | assembler-arm.cc | 362 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { in Operand() argument
367 shift_op_ = shift_op; in Operand()
370 if ((shift_op == ROR) && (shift_imm == 0)) { in Operand()
373 shift_op = LSL; in Operand()
374 } else if (shift_op == RRX) { in Operand()
382 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) { in Operand() argument
383 DCHECK(shift_op != RRX); in Operand()
386 shift_op_ = shift_op; in Operand()
419 MemOperand::MemOperand(Register rn, Register rm, ShiftOp shift_op, in MemOperand() argument
423 shift_op_(shift_op), in MemOperand()
[all …]
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 2622 Shift shift_op = NO_SHIFT; in DataProcessing2Source() local
2654 shift_op = LSL; in DataProcessing2Source()
2658 shift_op = LSR; in DataProcessing2Source()
2662 shift_op = ASR; in DataProcessing2Source()
2666 shift_op = ROR; in DataProcessing2Source()
2672 if (shift_op != NO_SHIFT) { in DataProcessing2Source()
2681 result = ShiftOperand(reg<T>(instr->Rn()), shift_op, shift); in DataProcessing2Source()
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| /third_party/node/deps/v8/src/compiler/backend/s390/ |
| D | instruction-selector-s390.cc | 1169 template <class Matcher, ArchOpcode shift_op>
1186 selector->Emit(shift_op, dst, g.UseRegister(left), g.UseImmediate(power), in TryMatchShiftFromMul()
1189 selector->Emit(shift_op, dst, g.UseRegister(left), g.UseImmediate(power)); in TryMatchShiftFromMul()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | instruction-selector-arm64.cc | 3805 IrOpcode::Value shift_op) { in ShraHelper() argument
3807 SimdAddOpMatcher m(node, shift_op); in ShraHelper()
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