/third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
D | r300_fragprog.c | 79 int tex_offset = (code_addr & R300_TEX_START_MASK) >> R300_TEX_START_SHIFT; in r300FragmentProgramDump() local 84 alu_offset, tex_offset, alu_end, tex_end, code_addr); in r300FragmentProgramDump() 88 for (i = tex_offset; in r300FragmentProgramDump() 89 i <= tex_offset + tex_end; in r300FragmentProgramDump()
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D | r300_fragprog_emit.c | 313 unsigned tex_offset; in finish_node() local 328 tex_offset = emit->node_first_tex; in finish_node() 329 tex_end = code->tex.length - tex_offset - 1; in finish_node() 355 | ((tex_offset << R300_TEX_START_SHIFT) in finish_node() 360 | (get_msbs_tex(tex_offset, 5) in finish_node()
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D | radeon_code.h | 179 int tex_offset; /**< first tex instruction */ member
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/third_party/mesa3d/src/gallium/auxiliary/nir/ |
D | nir_to_tgsi.c | 47 struct tgsi_texture_offset tex_offset; member 328 if (insn->is_tex && insn->tex_offset.File == TGSI_FILE_TEMPORARY) in ntt_live_reg_setup_def_use() 329 ntt_live_reg_mark_use(c, bs, ip, insn->tex_offset.Index, 0xf); in ntt_live_reg_setup_def_use() 508 if (insn->is_tex && insn->tex_offset.File == TGSI_FILE_TEMPORARY) { in ntt_allocate_regs() 509 ntt_ra_check(c, ra_map, released, ip, insn->tex_offset.Index); in ntt_allocate_regs() 510 insn->tex_offset.Index = ra_map[insn->tex_offset.Index]; in ntt_allocate_regs() 2724 struct tgsi_texture_offset tex_offset = { in ntt_emit_texture() local 2731 tex_offset.File = offset.File; in ntt_emit_texture() 2732 tex_offset.Index = offset.Index; in ntt_emit_texture() 2733 tex_offset.SwizzleX = offset.SwizzleX; in ntt_emit_texture() [all …]
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D | tgsi_to_nir.c | 1533 struct tgsi_texture_offset *tex_offset = &tgsi_inst->TexOffsets[i]; in ttn_tex() local 1542 tex_offset->File, in ttn_tex() 1543 tex_offset->Index, in ttn_tex() 1547 src.swizzle[0] = tex_offset->SwizzleX; in ttn_tex() 1548 src.swizzle[1] = tex_offset->SwizzleY; in ttn_tex() 1549 src.swizzle[2] = tex_offset->SwizzleZ; in ttn_tex()
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/third_party/libdrm/include/drm/ |
D | mach64_drm.h | 120 unsigned int tex_offset; member
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D | r128_drm.h | 146 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; member
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D | i915_drm.h | 225 int tex_offset; member
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/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
D | sfn_instr_tex.cpp | 494 PRegister tex_offset = nullptr; in emit_buf_txf() local 496 tex_offset = shader.emit_load_to_register(src.texture_offset); in emit_buf_txf() 507 tex_offset, fmt_invalid); in emit_buf_txf()
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/third_party/mesa3d/src/panfrost/vulkan/ |
D | panvk_descriptor_set.c | 146 layout->sets[set].tex_offset = tex_idx; in panvk_CreatePipelineLayout()
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D | panvk_vX_nir_lower_descriptors.c | 507 tex->texture_index = ctx->layout->sets[set].tex_offset + in lower_tex()
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D | panvk_private.h | 424 unsigned tex_offset; member
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/third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
D | nir_to_spirv.c | 3363 const_offset = 0, offset = 0, sample = 0, tex_offset = 0, bindless = 0, min_lod = 0; in emit_tex() local 3453 tex_offset = get_src_int(ctx, &tex->src[i].src); in emit_tex() 3473 if (!tex_offset) { in emit_tex() 3483 tex_offset = emit_uint_const(ctx, 32, texture_index - i); in emit_tex() 3496 if (tex_offset) { in emit_tex() 3498 sampler_id = spirv_builder_emit_access_chain(&ctx->builder, ptr, sampler_id, &tex_offset, 1); in emit_tex()
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/third_party/mesa3d/include/drm-uapi/ |
D | i915_drm.h | 349 int tex_offset; member
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/third_party/mesa3d/src/microsoft/vulkan/ |
D | dzn_device.c | 2586 uint64_t tex_offset = in dzn_buffer_get_line_copy_loc() local 2589 uint64_t offset = loc->PlacedFootprint.Offset + tex_offset; in dzn_buffer_get_line_copy_loc()
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/third_party/mesa3d/src/freedreno/vulkan/ |
D | tu_pipeline.c | 225 unsigned tex_offset = offset + 2 * i * A6XX_TEX_CONST_DWORDS; in tu6_emit_load_state() local 229 base, tex_offset, 1); in tu6_emit_load_state()
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