Searched refs:tiling_index (Results 1 – 13 of 13) sorted by relevance
58 tile_mode = info->si_tile_mode_array[surf->u.legacy.tiling_index[0]]; in set_micro_tile_mode()160 surf_drm->tiling_index[i] = surf_ws->u.legacy.tiling_index[i]; in surf_winsys_to_drm()203 surf_ws->u.legacy.tiling_index[i] = surf_drm->tiling_index[i]; in surf_drm_to_winsys()411 surf_ws->u.legacy.color.fmask.tiling_index = fmask.u.legacy.tiling_index[0]; in radeon_winsys_surface_init()
543 tex->surface.u.legacy.tiling_index[0] = 10; in si_set_optimal_micro_tile_mode()546 tex->surface.u.legacy.tiling_index[0] = 14; in si_set_optimal_micro_tile_mode()549 tex->surface.u.legacy.tiling_index[0] = 28; in si_set_optimal_micro_tile_mode()560 tex->surface.u.legacy.tiling_index[0] = 10; in si_set_optimal_micro_tile_mode()563 tex->surface.u.legacy.tiling_index[0] = 11; in si_set_optimal_micro_tile_mode()566 tex->surface.u.legacy.tiling_index[0] = 12; in si_set_optimal_micro_tile_mode()573 tex->surface.u.legacy.tiling_index[0] = 14; in si_set_optimal_micro_tile_mode()576 tex->surface.u.legacy.tiling_index[0] = 15; in si_set_optimal_micro_tile_mode()579 tex->surface.u.legacy.tiling_index[0] = 16; in si_set_optimal_micro_tile_mode()582 tex->surface.u.legacy.tiling_index[0] = 17; in si_set_optimal_micro_tile_mode()
56 unsigned tile_index = tex->surface.u.legacy.tiling_index[0]; in encode_legacy_tile_info()233 unsigned dst_tile_index = sdst->surface.u.legacy.tiling_index[0]; in cik_sdma_copy_texture()234 unsigned src_tile_index = ssrc->surface.u.legacy.tiling_index[0]; in cik_sdma_copy_texture()
1678 return tex->surface.u.legacy.tiling_index[level]; in si_tile_mode_index()
2775 unsigned index = tex->surface.u.legacy.tiling_index[level]; in si_init_depth_surface()3427 S_028C74_FMASK_TILE_MODE_INDEX(tex->surface.u.legacy.color.fmask.tiling_index); in si_emit_framebuffer_state()4507 fmask_state[3] |= S_008F1C_TILING_INDEX(tex->surface.u.legacy.color.fmask.tiling_index); in si_make_texture_descriptor()
880 tex->surface.u.legacy.tiling_index[i]); in si_print_texture_info()
108 uint8_t tiling_index; /* max 31 */ member132 uint8_t tiling_index[RADEON_SURF_MAX_LEVELS]; member
719 surf->u.legacy.tiling_index[level] = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()845 uint32_t tile_mode = info->si_tile_mode_array[surf->u.legacy.tiling_index[0]]; in gfx6_set_micro_tile_mode()1335 surf->u.legacy.color.fmask.tiling_index = fout.tileIndex; in gfx6_compute_surface()3099 surf->u.legacy.color.fmask.tiling_index); in ac_surface_print_info()
138 uint32_t tiling_index[RADEON_SURF_MAX_LEVEL]; member
1544 surf->tiling_index[i] = tile_mode; in si_surface_init_linear_aligned()1588 surf->tiling_index[i] = tile_mode; in si_surface_init_1d()1690 surf->tiling_index[i] = tile_mode; in si_surface_init_2d()2292 surf->tiling_index[i] = tile_mode; in cik_surface_init_2d()
649 out->tile_mode_index = fmask.u.legacy.tiling_index[0]; in r600_texture_get_fmask_info()872 rtex->surface.u.legacy.tiling_index[i]); in r600_print_texture_info()
6144 return plane->surface.u.legacy.tiling_index[level]; in si_tile_mode_index()6314 … cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(surf->u.legacy.color.fmask.tiling_index); in radv_initialise_color_surface()6674 unsigned tiling_index = surf->u.legacy.tiling_index[level]; in radv_initialise_ds_surface() local6677 unsigned tile_mode = info->si_tile_mode_array[tiling_index]; in radv_initialise_ds_surface()
659 return plane->surface.u.legacy.tiling_index[level]; in si_tile_mode_index()1309 S_008F1C_TILING_INDEX(image->planes[0].surface.u.legacy.color.fmask.tiling_index); in si_make_texture_descriptor()