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Searched refs:uimm10 (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td590 InstSE<(outs), (ins uimm10:$code_),
699 InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
1018 def SYSCALL_MM : MMRel, SYS_FT<"syscall", uimm10, II_SYSCALL>, SYS_FM_MM,
1098 def SDBBP_MM : MMRel, SYS_FT<"sdbbp", uimm10, II_SDBBP>, SDBBP_FM_MM,
1427 def : MipsInstAlias<"break $imm", (BREAK_MM uimm10:$imm, 0), 1>,
DMipsInstrInfo.td1629 InstSE<(outs), (ins uimm10:$code_1, uimm10:$code_2),
2158 def TEQ : MMRel, TEQ_FT<"teq", GPR32Opnd, uimm10, II_TEQ>, TEQ_FM<0x34>,
2160 def TGE : MMRel, TEQ_FT<"tge", GPR32Opnd, uimm10, II_TGE>, TEQ_FM<0x30>,
2162 def TGEU : MMRel, TEQ_FT<"tgeu", GPR32Opnd, uimm10, II_TGEU>, TEQ_FM<0x31>,
2164 def TLT : MMRel, TEQ_FT<"tlt", GPR32Opnd, uimm10, II_TLT>, TEQ_FM<0x32>,
2166 def TLTU : MMRel, TEQ_FT<"tltu", GPR32Opnd, uimm10, II_TLTU>, TEQ_FM<0x33>,
2168 def TNE : MMRel, TEQ_FT<"tne", GPR32Opnd, uimm10, II_TNE>, TEQ_FM<0x36>,
2606 InstSE<(outs), (ins uimm10:$code_),
2802 def : MipsInstAlias<"break $imm", (BREAK uimm10:$imm, 0), 1>, ISA_MIPS1;
DMipsDSPInstrInfo.td452 dag InOperandList = (ins uimm10:$mask);
463 dag InOperandList = (ins GPR32Opnd:$rs, uimm10:$mask);
/third_party/node/deps/v8/src/codegen/riscv64/
Dconstants-riscv64.h1720 int32_t uimm10 = ((Bits & 0x20) >> 2) | ((Bits & 0x40) >> 4) | in RvcImm8Addi4spnValue() local
1722 DCHECK_NE(uimm10, 0); in RvcImm8Addi4spnValue()
1723 return uimm10; in RvcImm8Addi4spnValue()
Dassembler-riscv64.cc2242 void Assembler::c_addi4spn(Register rd, int16_t uimm10) { in c_addi4spn() argument
2243 DCHECK(is_uint10(uimm10) && (uimm10 != 0)); in c_addi4spn()
2244 uint8_t uimm8 = ((uimm10 & 0x4) >> 1) | ((uimm10 & 0x8) >> 3) | in c_addi4spn()
2245 ((uimm10 & 0x30) << 2) | ((uimm10 & 0x3c0) >> 4); in c_addi4spn()
Dassembler-riscv64.h622 void c_addi4spn(Register rd, int16_t uimm10);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenInstrInfo.inc10703 uimm10 = 96,
14522 OpTypes::uimm10, OpTypes::uimm10,
14525 OpTypes::uimm10, OpTypes::uimm10,
14526 OpTypes::uimm10, OpTypes::uimm10,
15246 OpTypes::uimm10,
15247 OpTypes::uimm10,
15852 OpTypes::GPR32Opnd, OpTypes::uimm10,
15932 OpTypes::uimm10,
16234 OpTypes::uimm10,
16256 OpTypes::GPR32Opnd, OpTypes::GPR32Opnd, OpTypes::uimm10,
[all …]
DMipsGenAsmWriter.inc8237 // (BREAK uimm10:$imm, 0) - 45
8243 // (BREAK_MM uimm10:$imm, 0) - 49