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Searched refs:v1i128 (Results 1 – 15 of 15) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DREADME_P9.txt101 (set v1i128:$rD, (int_ppc_altivec_vprtybq v1i128:$vB))
134 VX1_Int_Ty<513, "vmul10uq", int_ppc_altivec_vmul10uq, v1i128>;
135 VX1_Int_Ty< 1, "vmul10cuq", int_ppc_altivec_vmul10cuq, v1i128>;
140 VX1_Int_Ty<577, "vmul10euq", int_ppc_altivec_vmul10euq, v1i128>;
141 VX1_Int_Ty< 65, "vmul10ecuq", int_ppc_altivec_vmul10ecuq, v1i128>;
146 (set v1i128:$vD, (int_ppc_altivec_bcdcfno v1i128:$vB, i1:$PS))
147 (set v1i128:$vD, (int_ppc_altivec_bcdcfzo v1i128:$vB, i1:$PS))
148 (set v1i128:$vD, (int_ppc_altivec_bcdctno v1i128:$vB))
149 (set v1i128:$vD, (int_ppc_altivec_bcdctzo v1i128:$vB, i1:$PS))
150 (set v1i128:$vD, (int_ppc_altivec_bcdcfsqo v1i128:$vB, i1:$PS))
[all …]
DPPCInstrAltivec.td884 def : Pat<(v16i8 (bitconvert (v1i128 VRRC:$src))), (v16i8 VRRC:$src)>;
890 def : Pat<(v8i16 (bitconvert (v1i128 VRRC:$src))), (v8i16 VRRC:$src)>;
896 def : Pat<(v4i32 (bitconvert (v1i128 VRRC:$src))), (v4i32 VRRC:$src)>;
902 def : Pat<(v4f32 (bitconvert (v1i128 VRRC:$src))), (v4f32 VRRC:$src)>;
908 def : Pat<(v2i64 (bitconvert (v1i128 VRRC:$src))), (v2i64 VRRC:$src)>;
910 def : Pat<(v1i128 (bitconvert (v16i8 VRRC:$src))), (v1i128 VRRC:$src)>;
911 def : Pat<(v1i128 (bitconvert (v8i16 VRRC:$src))), (v1i128 VRRC:$src)>;
912 def : Pat<(v1i128 (bitconvert (v4i32 VRRC:$src))), (v1i128 VRRC:$src)>;
913 def : Pat<(v1i128 (bitconvert (v4f32 VRRC:$src))), (v1i128 VRRC:$src)>;
914 def : Pat<(v1i128 (bitconvert (v2i64 VRRC:$src))), (v1i128 VRRC:$src)>;
[all …]
DPPCCallingConv.td67 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
107 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
163 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
251 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
DPPCRegisterInfo.td315 [v16i8,v8i16,v4i32,v2i64,v1i128,v4f32,v2f64, f128],
DPPCISelLowering.cpp598 if (Subtarget.hasP8Altivec() && (VT.SimpleTy != MVT::v1i128)) { in PPCTargetLowering()
608 if (Subtarget.hasP9Altivec() && (VT.SimpleTy != MVT::v1i128)) in PPCTargetLowering()
838 setOperationAction(ISD::SHL, MVT::v1i128, Expand); in PPCTargetLowering()
839 setOperationAction(ISD::SRL, MVT::v1i128, Expand); in PPCTargetLowering()
840 setOperationAction(ISD::SRA, MVT::v1i128, Expand); in PPCTargetLowering()
896 addRegisterClass(MVT::v1i128, &PPC::VRRCRegClass); in PPCTargetLowering()
906 setOperationAction(ISD::SHL, MVT::v1i128, Legal); in PPCTargetLowering()
907 setOperationAction(ISD::SRL, MVT::v1i128, Legal); in PPCTargetLowering()
908 setOperationAction(ISD::SRA, MVT::v1i128, Expand); in PPCTargetLowering()
952 setOperationAction(ISD::BSWAP, MVT::v1i128, Legal); in PPCTargetLowering()
[all …]
DPPCInstrVSX.td1071 def : Pat<(v2f64 (bitconvert v1i128:$A)),
1073 def : Pat<(v1i128 (bitconvert v2f64:$A)),
2997 def : Pat<(v1i128 (bswap v1i128 :$A)),
2998 (v1i128 (COPY_TO_REGCLASS (XXBRQ (COPY_TO_REGCLASS $A, VSRC)), VRRC))>;
4284 def : Pat<(v1i128 (bitconvert (v16i8 immAllOnesV))),
4285 (v1i128 (COPY_TO_REGCLASS(XXLEQVOnes), VSRC))>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h114 v1i128 = 63, // 1 x i128 enumerator
117 LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
352 SimpleTy == MVT::v2i64 || SimpleTy == MVT::v1i128 || in is128BitVector()
507 case v1i128: return i128; in getVectorElementType()
657 case v1i128: in getVectorNumElements()
763 case v1i128: in getSizeInBits()
982 if (NumElements == 1) return MVT::v1i128; in getVectorVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenCallingConv.inc63 LocVT == MVT::v1i128 ||
520 LocVT == MVT::v1i128 ||
668 LocVT == MVT::v1i128 ||
774 LocVT == MVT::v1i128 ||
DPPCGenDAGISel.inc17428 MVT::v1i128, 3/*#Ops*/, 0, 1, 2,
17429 … (intrinsic_wo_chain:{ *:[v1i128] } 5637:{ *:[iPTR] }, v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i1…
17430 …// Dst: (VADDEUQM:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB, v1i128:{ *:…
17437 MVT::v1i128, 2/*#Ops*/, 0, 1,
17438 …// Src: (intrinsic_wo_chain:{ *:[v1i128] } 5634:{ *:[iPTR] }, v1i128:{ *:[v1i128] }:$vA, v1i128:{ …
17439 … // Dst: (VADDCUQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
17447 MVT::v1i128, 3/*#Ops*/, 0, 1, 2,
17448 … (intrinsic_wo_chain:{ *:[v1i128] } 5636:{ *:[iPTR] }, v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i1…
17449 …// Dst: (VADDECUQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB, v1i128:{ *:…
17457 MVT::v1i128, 3/*#Ops*/, 0, 1, 2,
[all …]
DPPCGenFastISel.inc1793 if (RetVT.SimpleTy != MVT::v1i128)
1810 case MVT::v1i128: return fastEmit_ISD_ADD_MVT_v1i128_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
2845 if (RetVT.SimpleTy != MVT::v1i128)
2860 case MVT::v1i128: return fastEmit_ISD_SUB_MVT_v1i128_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
DPPCGenRegisterInfo.inc3925 …/* 12 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v1i128, MVT::v4f32, MVT::v2f64, MVT:…
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td89 def v1i128 : ValueType<128, 63>; // 1 x i128 vector value
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp208 case MVT::v1i128: return VectorType::get(Type::getInt128Ty(Context), 1); in getTypeForEVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td157 /// PowerPC_Vec_QQQ_Intrinsic - A PowerPC intrinsic that takes two v1i128
DIntrinsics.td272 def llvm_v1i128_ty : LLVMType<v1i128>; // 1 x i128