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/third_party/mesa3d/src/panfrost/bifrost/valhall/test/
Dassembler-cases.txt20 01 00 00 0c 00 c0 a5 00 FADD.v2f16 r0, r1.h00, r0.h11
21 01 00 00 28 00 c0 a5 00 FADD.v2f16 r0, r1, r0
22 01 00 00 24 00 c0 a5 00 FADD.v2f16 r0, r1, r0.h10
41 00 00 0f a0 00 40 90 00 FROUND.v2f16.rtn r0.h0, r0
42 01 00 0f 90 00 40 90 00 FROUND.v2f16.rtn r0.h0, r1.h10
43 01 00 0f a0 00 41 90 00 FROUND.v2f16.rtn r1.h0, r1
44 00 00 0f 90 00 40 90 00 FROUND.v2f16.rtn r0.h0, r0.h10
49 40 c0 00 28 90 c0 a5 48 FADD.v2f16.wait r0, ^r0.abs, 0x0.neg
86 42 84 67 ac 70 c2 15 01 FADD_IMM.v2f16 r2, ^r2, #0x70AC6784
91 43 42 c0 90 01 c2 f5 00 FCMP.v2f16.gt.m1 r2, ^r3.h10, ^r2.h00, 0x0
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Dnegative-cases.txt9 FADD.v2f16 r0, r1, r0.h0
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUCallingConv.td21 CCIfInReg<CCIfType<[f32, i32, f16, v2i16, v2f16] , CCAssignToReg<[
31 CCIfNotInReg<CCIfType<[f32, i32, f16, v2i16, v2f16] , CCAssignToReg<[
63 CCIfType<[f32, f16, v2f16] , CCAssignToReg<[
115 CCIfType<[i32, f32, i16, f16, v2i16, v2f16, i1], CCAssignToReg<[
120 CCIfType<[i32, f32, v2i16, v2f16, i16, f16, i1], CCAssignToStack<4, 4>>,
133 CCIfType<[i32, f32, i16, f16, v2i16, v2f16], CCAssignToReg<[
DSIRegisterInfo.td230 def SGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
259 def TTMP_32 : RegisterClass<"AMDGPU", [i32, f32, v2i16, v2f16], 32,
358 def Reg32Types : RegisterTypes<[i32, f32, v2i16, v2f16, p2, p3, p5, p6]>;
391 def AGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
413 def Pseudo_SReg_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
425 def LDS_DIRECT_CLASS : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
433 def SReg_32_XM0_XEXEC : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16, i1], 32,
441 def SReg_32_XEXEC_HI : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16, i1], 32,
446 def SReg_32_XM0 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16, i1], 32,
452 def SReg_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16, i1], 32,
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DSIInstructions.td941 (v2f16 (EXTRACT_SUBREG v4f16:$vec, sub0))
946 (v2f16 (EXTRACT_SUBREG v4f16:$vec, sub1))
982 def : BitConvert <v2f16, i32, SReg_32>;
983 def : BitConvert <i32, v2f16, SReg_32>;
984 def : BitConvert <v2i16, v2f16, SReg_32>;
985 def : BitConvert <v2f16, v2i16, SReg_32>;
986 def : BitConvert <v2f16, f32, SReg_32>;
987 def : BitConvert <f32, v2f16, SReg_32>;
1080 (v2f16 (AMDGPUclamp (VOP3PMods v2f16:$src0, i32:$src0_modifiers))),
1135 (fneg (v2f16 SReg_32:$src)),
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DFLATInstructions.td673 "global_atomic_pk_add_f16", VGPR_32, v2f16, atomic_pk_fadd_global_noret
825 def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_flat, v2f16>;
827 def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_flat, v2f16>;
829 def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16_HI, load_d16_hi_flat, v2f16>;
832 def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16, az_extloadi8_d16_lo_flat, v2f16>;
834 def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16, sextloadi8_d16_lo_flat, v2f16>;
836 def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16, load_d16_lo_flat, v2f16>;
885 def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_global, v2f16>;
887 def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_global, v2f16>;
889 def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SHORT_D16_HI, load_d16_hi_global, v2f16>;
[all …]
DSIInstrInfo.td204 def SIbuffer_atomic_pk_fadd : SDBufferAtomicNoRtn <"AMDGPUISD::BUFFER_ATOMIC_PK_FADD", v2f16>;
228 def SIglobal_atomic_pk_fadd : SDGlobalAtomicNoRtn <"AMDGPUISD::ATOMIC_PK_FADD", v2f16>;
284 !if(!eq(SrcVT.Value, v2f16.Value), 1,
302 !if(!eq(SrcVT.Value, v2f16.Value), 1,
337 let MemoryVT = v2f16;
1473 !if(!eq(VT.Value, v2f16.Value),
1527 !if(!eq(VT.Value, v2f16.Value),
1554 !if(!eq(SrcVT.Value, v2f16.Value), 1,
2251 def VOP_V2F16_V2F16_V2F16 : VOPProfile <[v2f16, v2f16, v2f16, untyped]>;
2255 def VOP_V2F16_V2F16_V2F16_V2F16 : VOPProfile <[v2f16, v2f16, v2f16, v2f16]>;
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DBUFInstructions.td425 !if(!eq(vtAsStr, "v2f16"), 2,
836 "buffer_load_format_d16_xy", v2f16
848 "buffer_store_format_d16_xy", v2f16
1095 "buffer_atomic_pk_add_f16", VGPR_32, v2f16, atomic_pk_fadd_global_noret
1231 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, v2f16, "BUFFER_LOAD_FORMAT_D16_XY">;
1240 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load, v2f16, "BUFFER_LOAD_DWORD">;
1313 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, v2f16, "BUFFER_STORE_FORMAT_D16_XY">;
1322 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store, v2f16, "BUFFER_STORE_DWORD">;
1438 defm : BufferAtomicPatterns_NO_RTN<SIbuffer_atomic_pk_fadd, v2f16, "BUFFER_ATOMIC_PK_ADD_F16">;
1597 …dPat_D16<BUFFER_LOAD_SHORT_D16_HI_OFFEN, BUFFER_LOAD_SHORT_D16_HI_OFFSET, v2f16, load_d16_hi_priva…
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DSIISelLowering.cpp156 addRegisterClass(MVT::v2f16, &AMDGPU::SReg_32RegClass); in SITargetLowering()
318 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Custom); in SITargetLowering()
323 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f16, Custom); in SITargetLowering()
525 for (MVT VT : {MVT::v2i16, MVT::v2f16, MVT::v4i16, MVT::v4f16}) { in SITargetLowering()
550 setOperationAction(ISD::ConstantFP, MVT::v2f16, Legal); in SITargetLowering()
553 setOperationAction(ISD::UNDEF, MVT::v2f16, Legal); in SITargetLowering()
557 setOperationAction(ISD::STORE, MVT::v2f16, Promote); in SITargetLowering()
558 AddPromotedToType(ISD::STORE, MVT::v2f16, MVT::i32); in SITargetLowering()
562 setOperationAction(ISD::LOAD, MVT::v2f16, Promote); in SITargetLowering()
563 AddPromotedToType(ISD::LOAD, MVT::v2f16, MVT::i32); in SITargetLowering()
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DDSInstructions.td677 def : DSReadPat_D16<DS_READ_U16_D16_HI, load_d16_hi_local, v2f16>;
679 def : DSReadPat_D16<DS_READ_U8_D16_HI, az_extloadi8_d16_hi_local, v2f16>;
681 def : DSReadPat_D16<DS_READ_I8_D16_HI, sextloadi8_d16_hi_local, v2f16>;
684 def : DSReadPat_D16<DS_READ_U16_D16, load_d16_lo_local, v2f16>;
686 def : DSReadPat_D16<DS_READ_U8_D16, az_extloadi8_d16_lo_local, v2f16>;
688 def : DSReadPat_D16<DS_READ_I8_D16, sextloadi8_d16_lo_local, v2f16>;
DVOP3PInstructions.td104 (v2f16 (mixhi_inst $src0_modifiers, $src0,
117 (v2f16 (mixhi_inst $src0_modifiers, $src0,
132 (v2f16 (mixhi_inst $hi_src0_modifiers, $hi_src0,
DVOP2Instructions.td336 def VOP_DOT_ACC_F32_V2F16 : VOP_DOT_ACC<f32, v2f16> {
676 (f32 (AMDGPUfdot2 v2f16:$src0, v2f16:$src1, f32:$src2, (i1 DSTCLAMP.NONE))),
DAMDGPUISelLowering.cpp153 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in AMDGPUTargetLowering()
166 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand); in AMDGPUTargetLowering()
217 setTruncStoreAction(MVT::v2f32, MVT::v2f16, Expand); in AMDGPUTargetLowering()
228 setTruncStoreAction(MVT::v2f64, MVT::v2f16, Expand); in AMDGPUTargetLowering()
752 (Subtarget->hasVOP3PInsts() && VT == MVT::v2f16); in isFNegFree()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h119 v2f16 = 64, // 2 x f16 enumerator
144 FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v2f16,
337 SimpleTy == MVT::v2f16 || SimpleTy == MVT::v1f32); in is32BitVector()
508 case v2f16: in getVectorElementType()
641 case v2f16: in getVectorNumElements()
723 case v2f16: in getSizeInBits()
985 if (NumElements == 2) return MVT::v2f16; in getVectorVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp147 case MVT::v2f16: in IsPTXVectorType()
208 EltVT = MVT::v2f16; in ComputePTXValueVTs()
383 addRegisterClass(MVT::v2f16, &NVPTX::Float16x2RegsRegClass); in NVPTXTargetLowering()
388 setOperationAction(ISD::BUILD_VECTOR, MVT::v2f16, Custom); in NVPTXTargetLowering()
389 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f16, Custom); in NVPTXTargetLowering()
390 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Expand); in NVPTXTargetLowering()
391 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f16, Expand); in NVPTXTargetLowering()
394 setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand); in NVPTXTargetLowering()
397 for (MVT VT : {MVT::f16, MVT::v2f16, MVT::f32, MVT::f64, MVT::i1, MVT::i8, in NVPTXTargetLowering()
453 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in NVPTXTargetLowering()
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DNVPTXRegisterInfo.td62 def Float16x2Regs : NVPTXRegClass<[v2f16], 32, (add (sequence "HH%u", 0, 4))>;
DNVPTXISelDAGToDAG.cpp610 if (Vector.getSimpleValueType() != MVT::v2f16) in tryEXTRACT_VECTOR_ELEMENT()
828 case MVT::v2f16: in pickOpcodeForVT()
895 assert(LoadedVT == MVT::v2f16 && "Unexpected vector type"); in tryLoad()
1065 if (EltVT == MVT::v2f16) { in tryLoadVector()
1274 if (EltVT == MVT::f16 && N->getValueType(0) == MVT::v2f16) { in tryLDGLDU()
1276 EltVT = MVT::v2f16; in tryLDGLDU()
1753 assert(StoreVT == MVT::v2f16 && "Unexpected vector type"); in tryStore()
1937 if (EltVT == MVT::v2f16) { in tryStoreVector()
/third_party/mesa3d/docs/relnotes/
D21.3.7.rst43 - pan/bi: Avoid \*FADD.v2f16 hazard in optimizer
44 - pan/bi: Avoid \*FADD.v2f16 hazard in scheduler
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_llvm_ps.c228 return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2f16, ""); in pack_two_16bit()
866 ctx->ac.v2f16, ""); in si_llvm_build_ps_epilog()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td91 def v2f16 : ValueType<32 , 64>; // 2 x f16 vector value
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp209 case MVT::v2f16: return VectorType::get(Type::getHalfTy(Context), 2); in getTypeForEVT()
/third_party/mesa3d/src/amd/llvm/
Dac_llvm_build.h86 LLVMTypeRef v2f16; member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td1166 llvm_anyvector_ty, // src0 (v2f16 or v2i16)
1597 // f32 %r = llvm.amdgcn.fdot2(v2f16 %a, v2f16 %b, f32 %c, i1 %clamp)
/third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/ray_tracing/
DvktRayTracingDataSpillTests.cpp1425 using v2f16 = tcu::Vector<tcu::Float16, 2>; typedef
1515 else if (dataType == DataType::FLOAT16) GEN_V2_FILL(v2f16); in fillInputBuffer()
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/ray_tracing/
DvktRayTracingDataSpillTests.cpp1425 using v2f16 = tcu::Vector<tcu::Float16, 2>; typedef
1515 else if (dataType == DataType::FLOAT16) GEN_V2_FILL(v2f16); in fillInputBuffer()

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