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Searched refs:value_reg (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/lima/ir/gp/
Dregalloc.c360 node->value_reg = color; in assign_regs()
418 assert(src->value_reg >= 0); in add_fake_dep()
419 if (ctx->last_written[src->value_reg] && in add_fake_dep()
420 ctx->last_written[src->value_reg] != node) { in add_fake_dep()
421 gpir_node_add_dep(ctx->last_written[src->value_reg], node, in add_fake_dep()
435 ctx->complex1_last_written[src->value_reg]) { in add_fake_dep()
436 gpir_node_add_dep(ctx->complex1_last_written[src->value_reg], in add_fake_dep()
446 if (src->value_reg < 0) { in handle_value_read()
451 src->value_reg = reg; in handle_value_read()
486 ctx->live[new_reg]->value_reg = new_reg; in handle_reg_read()
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Dgpir.h168 int value_reg; member
/third_party/node/deps/v8/src/wasm/baseline/ia32/
Dliftoff-assembler-ia32.h677 Register value_reg = is_64_bit_op ? value.low_gp() : value.gp(); in AtomicAddOrSubOrExchange32() local
681 LiftoffRegList pinned = {dst_addr, value_reg, offset_reg}; in AtomicAddOrSubOrExchange32()
684 if (is_byte_store && !liftoff::kByteRegs.has(value_reg)) { in AtomicAddOrSubOrExchange32()
687 __ mov(safe_value_reg, value_reg); in AtomicAddOrSubOrExchange32()
688 value_reg = safe_value_reg; in AtomicAddOrSubOrExchange32()
693 __ neg(value_reg); in AtomicAddOrSubOrExchange32()
702 __ xchg_b(value_reg, dst_op); in AtomicAddOrSubOrExchange32()
704 __ xadd_b(dst_op, value_reg); in AtomicAddOrSubOrExchange32()
706 __ movzx_b(result_reg, value_reg); in AtomicAddOrSubOrExchange32()
711 __ xchg_w(value_reg, dst_op); in AtomicAddOrSubOrExchange32()
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/third_party/node/deps/v8/src/wasm/baseline/x64/
Dliftoff-assembler-x64.h659 Register value_reg = value.gp(); in AtomicBinop() local
663 LiftoffRegList pinned = LiftoffRegList{dst_addr, offset_reg, value_reg}; in AtomicBinop()
664 __ ClearRegister(rax, {&dst_addr, &offset_reg, &value_reg}, pinned); in AtomicBinop()
675 (lasm->*opl)(kScratchRegister, value_reg); in AtomicBinop()
688 (lasm->*opl)(kScratchRegister, value_reg); in AtomicBinop()
700 (lasm->*opl)(kScratchRegister, value_reg); in AtomicBinop()
711 (lasm->*opq)(kScratchRegister, value_reg); in AtomicBinop()
795 Register value_reg = new_value.gp(); in AtomicCompareExchange() local
800 LiftoffRegList{dst_addr, offset_reg, expected, value_reg}; in AtomicCompareExchange()
801 ClearRegister(rax, {&dst_addr, &offset_reg, &value_reg}, pinned); in AtomicCompareExchange()
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/third_party/node/deps/v8/src/compiler/backend/x64/
Dcode-generator-x64.cc498 Operand operand, Register value_reg, in EmitTSANStoreOOL() argument
509 auto tsan_ool = zone->New<OutOfLineTSANStore>(codegen, operand, value_reg, in EmitTSANStoreOOL()
521 Register value_reg = i.TempRegister(1); in GetTSANValueRegister() local
522 tasm->movq(value_reg, value); in GetTSANValueRegister()
523 tasm->EncodeSandboxedPointer(value_reg); in GetTSANValueRegister()
524 return value_reg; in GetTSANValueRegister()
538 Register value_reg = i.TempRegister(1); in GetTSANValueRegister() local
539 tasm->movq(value_reg, value); in GetTSANValueRegister()
542 tasm->EncodeSandboxedPointer(value_reg); in GetTSANValueRegister()
544 return value_reg; in GetTSANValueRegister()
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