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/third_party/vixl/test/
Dtest-runner.cc34 vixl::Test* vixl::Test::first_ = NULL;
35 vixl::Test* vixl::Test::last_ = NULL;
37 bool vixl::Test::verbose_ = false;
40 bool vixl::Test::trace_sim_ = false;
41 bool vixl::Test::trace_reg_ = false;
42 bool vixl::Test::trace_write_ = false;
43 bool vixl::Test::trace_branch_ = false;
46 bool vixl::Test::disassemble_ = false;
47 bool vixl::Test::disassemble_infrastructure_ = false;
50 bool vixl::Test::coloured_trace_ = false;
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/third_party/vixl/examples/aarch64/
Dexamples.h37 void GenerateFactorial(vixl::aarch64::MacroAssembler* masm);
43 void GenerateFactorialRec(vixl::aarch64::MacroAssembler* masm);
49 void GenerateNEONMatrixMultiply(vixl::aarch64::MacroAssembler* masm);
55 void GenerateAdd2Vectors(vixl::aarch64::MacroAssembler* masm);
62 void GenerateAdd3Double(vixl::aarch64::MacroAssembler* masm);
69 void GenerateAdd4Double(vixl::aarch64::MacroAssembler* masm);
76 void GenerateSumArray(vixl::aarch64::MacroAssembler* masm);
82 void GenerateAbs(vixl::aarch64::MacroAssembler* masm);
91 void GenerateCheckBounds(vixl::aarch64::MacroAssembler* masm);
98 void GenerateCrc32(vixl::aarch64::MacroAssembler* masm);
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Dnon-const-visitor.h33 class SwitchAddSubRegisterSources : public vixl::aarch64::DecoderVisitor {
36 : vixl::aarch64::DecoderVisitor(kNonConstVisitor) {} in SwitchAddSubRegisterSources()
41 virtual void Visit(vixl::aarch64::Metadata* metadata,
42 const vixl::aarch64::Instruction* instr) VIXL_OVERRIDE;
46 void GenerateNonConstVisitorTestCode(vixl::aarch64::MacroAssembler* masm);
49 const vixl::aarch64::Instruction* start_instr);
51 void ModifyNonConstVisitorTestGeneratedCode(vixl::aarch64::Instruction* start,
52 vixl::aarch64::Instruction* end);
Dcustom-disassembler.h38 class CustomDisassembler : public vixl::aarch64::Disassembler {
40 CustomDisassembler() : vixl::aarch64::Disassembler() {} in CustomDisassembler()
43 virtual void Visit(vixl::aarch64::Metadata* metadata,
44 const vixl::aarch64::Instruction* instr) VIXL_OVERRIDE;
48 const vixl::aarch64::Instruction* instr,
49 const vixl::aarch64::CPURegister& reg) VIXL_OVERRIDE;
52 const vixl::aarch64::Instruction* instr, const void* addr) VIXL_OVERRIDE;
Dexecutable-memory.h48 ExecutableMemory(const vixl::byte* code_start, size_t size) in ExecutableMemory()
50 buffer_(reinterpret_cast<vixl::byte*>(mmap(NULL, in ExecutableMemory()
59 vixl::aarch64::CPU::EnsureIAndDCacheCoherency(buffer_, size_); in ExecutableMemory()
66 T GetEntryPoint(const vixl::aarch64::Label& entry_point) const { in GetEntryPoint()
76 vixl::byte* buffer_address = buffer_ + offset; in GetOffsetAddress()
84 vixl::byte* buffer_;
Dgetting-started.cc32 using namespace vixl;
33 using namespace vixl::aarch64;
37 using namespace vixl::aarch64;
Ddisasm.cc39 using namespace vixl;
40 using namespace vixl::aarch64;
126 vixl::aarch64::PrintDisassembler disasm(stdout); in main()
Dcpu-features.cc29 using namespace vixl;
30 using namespace vixl::aarch64;
Dcustom-disassembler.cc32 using namespace vixl;
33 using namespace vixl::aarch64;
111 vixl::aarch64::Disassembler::Visit(metadata, instr); in Visit()
Dabs.cc29 using namespace vixl;
30 using namespace vixl::aarch64;
Dadd3-double.cc29 using namespace vixl;
30 using namespace vixl::aarch64;
/third_party/vixl/benchmarks/aarch64/
Dbench-utils.h174 explicit BenchCodeGenerator(vixl::aarch64::MacroAssembler* masm) in BenchCodeGenerator()
232 vixl::aarch64::Register PickR(unsigned size_in_bits);
233 vixl::aarch64::VRegister PickV(
234 unsigned size_in_bits = vixl::aarch64::kQRegSize);
236 vixl::aarch64::Register PickW() { return PickR(vixl::aarch64::kWRegSize); } in PickW()
237 vixl::aarch64::Register PickX() { return PickR(vixl::aarch64::kXRegSize); } in PickX()
238 vixl::aarch64::VRegister PickH() { return PickV(vixl::aarch64::kHRegSize); } in PickH()
239 vixl::aarch64::VRegister PickS() { return PickV(vixl::aarch64::kSRegSize); } in PickS()
240 vixl::aarch64::VRegister PickD() { return PickV(vixl::aarch64::kDRegSize); } in PickD()
242 vixl::aarch64::MacroAssembler* masm_;
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Dbench-mixed-masm.cc34 using namespace vixl;
35 using namespace vixl::aarch64;
Dbench-dataop.cc34 using namespace vixl;
35 using namespace vixl::aarch64;
Dbench-branch-link.cc34 using namespace vixl;
35 using namespace vixl::aarch64;
Dbench-branch.cc34 using namespace vixl;
35 using namespace vixl::aarch64;
/third_party/vixl/
DCMakeLists.txt28 project(vixl) project
31 src/code-buffer-vixl.cc
32 src/compiler-intrinsics-vixl.cc
34 src/utils-vixl.cc )
98 add_library(vixl STATIC ${VIXL_SOURCES}) target
99 target_link_libraries(vixl arkbase)
101 target_compile_options(vixl PUBLIC ${VIXL_FLAGS})
102 target_compile_options(vixl PRIVATE -Wno-shadow)
104 target_compile_definitions(vixl PUBLIC "VIXL_USE_PANDA_ALLOC")
107 target_compile_options(vixl PRIVATE -Wno-bitwise-instead-of-logical)
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DBUILD.gn44 "$ark_third_party_root/vixl",
45 "$ark_third_party_root/vixl/src",
48 include_dirs += [ "$ark_third_party_root/vixl/src/aarch32" ]
51 include_dirs += [ "$ark_third_party_root/vixl/src/aarch64" ]
57 "src/code-buffer-vixl.cc",
58 "src/compiler-intrinsics-vixl.cc",
60 "src/utils-vixl.cc",
110 part_name = "vixl"
DREADME.OpenSource3 "Name": "vixl",
8 "Upstream URL": "https://github.com/Linaro/vixl",
9 … "Description": "vixl is a programmatic assemblers to generate A64, A32 or T32 code at runtime."
/third_party/vixl/src/aarch64/
Dinstructions-aarch64.h35 namespace vixl {
146 using vixl::kDoubleMantissaBits;
147 using vixl::kDoubleExponentBits;
148 using vixl::kFloatMantissaBits;
149 using vixl::kFloatExponentBits;
150 using vixl::kFloat16MantissaBits;
151 using vixl::kFloat16ExponentBits;
153 using vixl::kFP16PositiveInfinity;
154 using vixl::kFP16NegativeInfinity;
155 using vixl::kFP32PositiveInfinity;
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/third_party/vixl/test/aarch64/
Dtest-api-aarch64.cc43 namespace vixl { namespace
109 ::vixl::internal::SimFloat16 f1 = kFP16DefaultNaN; in TEST()
110 ::vixl::internal::SimFloat16 f2 = kFP16DefaultNaN; in TEST()
111 ::vixl::internal::SimFloat16 f3 = kFP16PositiveInfinity; in TEST()
112 ::vixl::internal::SimFloat16 f4 = kFP16NegativeInfinity; in TEST()
117 VIXL_CHECK(::vixl::internal::SimFloat16(kFP16PositiveZero) == in TEST()
118 ::vixl::internal::SimFloat16(kFP16NegativeZero)); in TEST()
119 VIXL_CHECK(!(::vixl::internal::SimFloat16(kFP16PositiveZero) != in TEST()
120 ::vixl::internal::SimFloat16(kFP16NegativeZero))); in TEST()
141 VIXL_CHECK(vixl::aarch64::kFP64PositiveInfinity == in TEST()
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/third_party/vixl/src/
Dcpu-features.h35 namespace vixl {
392 const vixl::CPUFeatures& features);
395 std::ostream& operator<<(std::ostream& os, vixl::CPUFeatures::Feature feature);
396 std::ostream& operator<<(std::ostream& os, const vixl::CPUFeatures& features);
/third_party/vixl/examples/aarch32/
Dgetting-started.cc29 using namespace vixl;
30 using namespace vixl::aarch32;
Dabs.cc29 using namespace vixl;
30 using namespace vixl::aarch32;
/third_party/vixl/benchmarks/aarch32/
Dbench-dataop.cc35 using namespace vixl;
36 using namespace vixl::aarch32;

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