| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 736 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, in buildAtomicCmpXchgWithSuccess() argument
742 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchgWithSuccess()
757 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess()
764 Register CmpVal, Register NewVal, in buildAtomicCmpXchg() argument
769 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchg()
782 .addUse(CmpVal) in buildAtomicCmpXchg()
|
| D | LegalizerHelper.cpp | 2062 Register CmpVal = MI.getOperand(3).getReg(); in lower() local
2064 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, in lower()
2066 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal); in lower()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 2286 uint64_t Mask, uint64_t CmpVal, in getTestUnderMaskCond() argument
2305 if (CmpVal == 0) { in getTestUnderMaskCond()
2311 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { in getTestUnderMaskCond()
2317 if (EffectivelyUnsigned && CmpVal < Low) { in getTestUnderMaskCond()
2325 if (CmpVal == Mask) { in getTestUnderMaskCond()
2331 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { in getTestUnderMaskCond()
2337 if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) { in getTestUnderMaskCond()
2345 if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) { in getTestUnderMaskCond()
2351 if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) { in getTestUnderMaskCond()
2361 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low) in getTestUnderMaskCond()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.h | 217 Value *AlignedAddr, Value *CmpVal,
|
| D | RISCVISelLowering.cpp | 2866 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
2871 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic()
2880 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 984 Register Addr, Register CmpVal, Register NewVal,
1002 Register CmpVal, Register NewVal,
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 2169 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local
2174 CmpVal, VAddr, SRsrc, SOffset, Offset, SLC, Mem->getChain() in SelectATOMIC_CMP_SWAP()
2187 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local
2189 CmpVal, SRsrc, SOffset, Offset, SLC, Mem->getChain() in SelectATOMIC_CMP_SWAP()
|
| D | AMDGPULegalizerInfo.cpp | 1783 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg() local
1790 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
1794 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 363 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; in LowerFPToInt() local
404 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal))); in LowerFPToInt()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 4254 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); in foldICmpEquality() local
4255 return new ICmpInst(NewPred, Xor, Builder.getInt(CmpVal)); in foldICmpEquality()
5057 unsigned CmpVal = CI->countTrailingZeros(); in foldICmpUsingKnownBits() local
5059 return new ICmpInst(NewPred, X, ConstantInt::get(X->getType(), CmpVal)); in foldICmpUsingKnownBits()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/ |
| D | AddressSanitizer.cpp | 1700 Value *CmpVal = Constant::getNullValue(ShadowTy); in instrumentAddress() local
1704 Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal); in instrumentAddress()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 1743 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1910 Register CmpVal = MI.getOperand(2).getReg(); in emitAtomicCmpSwapPartword() local
1988 .addReg(CmpVal).addImm(MaskImm); in emitAtomicCmpSwapPartword()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 5338 static bool isUndefOrEqual(int Val, int CmpVal) { in isUndefOrEqual() argument
5339 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); in isUndefOrEqual()
|