Searched refs:MulVal (Results 1 – 5 of 5) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 4562 static Instruction *processUMulZExtIdiom(ICmpInst &I, Value *MulVal, in processUMulZExtIdiom() argument
4566 if (!isa<IntegerType>(MulVal->getType())) in processUMulZExtIdiom()
4569 assert(I.getOperand(0) == MulVal || I.getOperand(1) == MulVal); in processUMulZExtIdiom()
4571 auto *MulInstr = dyn_cast<Instruction>(MulVal); in processUMulZExtIdiom()
4599 if (MulVal->hasNUsesOrMore(2)) in processUMulZExtIdiom()
4600 for (User *U : MulVal->users()) { in processUMulZExtIdiom()
4649 if (ValToMask != MulVal) in processUMulZExtIdiom()
4727 if (MulVal->hasNUsesOrMore(2)) { in processUMulZExtIdiom()
4729 for (auto UI = MulVal->user_begin(), UE = MulVal->user_end(); UI != UE;) { in processUMulZExtIdiom()
4768 if (I.getOperand(0) == MulVal) in processUMulZExtIdiom()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2051 SDValue MulVal = N.getOperand(0); in matchAddressRecursively() local
2057 if (MulVal.getNode()->getOpcode() == ISD::ADD && MulVal.hasOneUse() && in matchAddressRecursively()
2058 isa<ConstantSDNode>(MulVal.getOperand(1))) { in matchAddressRecursively()
2059 Reg = MulVal.getOperand(0); in matchAddressRecursively()
2061 cast<ConstantSDNode>(MulVal.getOperand(1)); in matchAddressRecursively()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 1602 auto MulVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags); in legalizeSinCos() local
1604 .addUse(MulVal.getReg(0)) in legalizeSinCos()
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| D | SIISelLowering.cpp | 7984 SDValue MulVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi); in LowerTrig() local
7985 TrigVal = DAG.getNode(AMDGPUISD::FRACT, DL, VT, MulVal); in LowerTrig()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 4672 APInt MulVal = APInt(BitWidth, 1) << ShiftAmt; in TryMULWIDECombine() local
4673 RHS = DCI.DAG.getConstant(MulVal, DL, MulType); in TryMULWIDECombine()
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