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Searched refs:Pieces (Results 1 – 5 of 5) sorted by relevance

/third_party/vk-gl-cts/external/amber/src/src/
Dtype_parser.h48 struct Pieces { struct
49 Pieces(FormatComponentType t, FormatMode m, uint8_t bits) in Pieces() argument
59 std::vector<Pieces> pieces_; argument
Dtype_parser.cc82 pieces_.insert(pieces_.begin(), Pieces{type, mode, bits}); in AddPiece()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp88 unsigned Pieces = (Size + 63) / 64; in fewerEltsToSize64Vector() local
89 unsigned NewNumElts = (Ty.getNumElements() + 1) / Pieces; in fewerEltsToSize64Vector()
DSIISelLowering.cpp4946 SmallVector<SDValue, 4> Pieces; in lowerVECTOR_SHUFFLE() local
4955 Pieces.push_back(SubVec); in lowerVECTOR_SHUFFLE()
4971 Pieces.push_back(DAG.getBuildVector(PackVT, SL, { Elt0, Elt1 })); in lowerVECTOR_SHUFFLE()
4975 return DAG.getNode(ISD::CONCAT_VECTORS, SL, ResultVT, Pieces); in lowerVECTOR_SHUFFLE()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp46269 static bool matchAsm(StringRef S, ArrayRef<const char *> Pieces) { in matchAsm() argument
46272 for (StringRef Piece : Pieces) { in matchAsm()