Lines Matching full:e2
71 V(Add, (GateRef gate, GateRef e1, GateRef e2)) \
72 V(Sub, (GateRef gate, GateRef e1, GateRef e2)) \
73 V(Mul, (GateRef gate, GateRef e1, GateRef e2)) \
74 V(FloatDiv, (GateRef gate, GateRef e1, GateRef e2)) \
75 V(IntDiv, (GateRef gate, GateRef e1, GateRef e2)) \
76 V(UDiv, (GateRef gate, GateRef e1, GateRef e2)) \
77 V(IntOr, (GateRef gate, GateRef e1, GateRef e2)) \
78 V(IntAnd, (GateRef gate, GateRef e1, GateRef e2)) \
79 V(IntXor, (GateRef gate, GateRef e1, GateRef e2)) \
80 V(IntLsr, (GateRef gate, GateRef e1, GateRef e2)) \
81 V(IntAsr, (GateRef gate, GateRef e1, GateRef e2)) \
82 V(Int32LessThanOrEqual, (GateRef gate, GateRef e1, GateRef e2)) \
83 V(Cmp, (GateRef gate, GateRef e1, GateRef e2)) \
95 V(IntLsl, (GateRef gate, GateRef e1, GateRef e2)) \
96 V(Mod, (GateRef gate, GateRef e1, GateRef e2)) \
101 V(AddWithOverflow, (GateRef gate, GateRef e1, GateRef e2)) \
102 V(SubWithOverflow, (GateRef gate, GateRef e1, GateRef e2)) \
103 V(MulWithOverflow, (GateRef gate, GateRef e1, GateRef e2)) \
104 V(ExtractValue, (GateRef gate, GateRef e1, GateRef e2)) \
106 V(Exp, (GateRef gate, GateRef e1, GateRef e2)) \
108 V(Min, (GateRef gate, GateRef e1, GateRef e2)) \
109 V(Max, (GateRef gate, GateRef e1, GateRef e2)) \