Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson-G12A Clock Controller Driver
13 #include <linux/clk-provider.h>
19 #include "clk-mpll.h"
20 #include "clk-pll.h"
21 #include "clk-regmap.h"
22 #include "clk-cpu-dyndiv.h"
23 #include "vid-pll-div.h"
24 #include "meson-eeclk.h"
30 .data = &(struct meson_clk_pll_data){
33 .shift = 28,
38 .shift = 0,
43 .shift = 10,
48 .shift = 0,
53 .shift = 31,
58 .shift = 29,
73 .data = &(struct clk_regmap_div_data){
75 .shift = 16,
99 .data = &(struct meson_clk_pll_data){
102 .shift = 28,
107 .shift = 0,
112 .shift = 10,
117 .shift = 31,
122 .shift = 29,
140 .data = &(struct clk_regmap_div_data){
142 .shift = 16,
158 .data = &(struct meson_clk_pll_data){
161 .shift = 28,
166 .shift = 0,
171 .shift = 10,
176 .shift = 31,
181 .shift = 29,
199 .data = &(struct clk_regmap_div_data){
201 .shift = 16,
217 .data = &(struct clk_regmap_gate_data){
234 .data = &(struct clk_regmap_gate_data){
290 .data = &(struct clk_regmap_gate_data){
308 * b) CCF has a clock hand-off mechanism to make the sure the
327 .data = &(struct clk_regmap_gate_data){
344 * b) CCF has a clock hand-off mechanism to make the sure the
353 .data = &(struct clk_regmap_mux_data){
356 .shift = 0,
374 .data = &(struct clk_regmap_mux_data){
377 .shift = 16,
388 /* This sub-tree is used a parking clock */
395 .data = &(struct meson_clk_cpu_dyndiv_data){
398 .shift = 4,
403 .shift = 26,
420 .data = &(struct clk_regmap_mux_data){
423 .shift = 2,
440 .data = &(struct clk_regmap_div_data){
442 .shift = 20,
457 .data = &(struct clk_regmap_mux_data){
460 .shift = 18,
470 /* This sub-tree is used a parking clock */
477 .data = &(struct clk_regmap_mux_data){
480 .shift = 10,
497 .data = &(struct clk_regmap_mux_data){
500 .shift = 11,
517 .data = &(struct clk_regmap_mux_data){
520 .shift = 11,
537 .data = &(struct clk_regmap_mux_data){
540 .shift = 0,
558 .data = &(struct meson_clk_cpu_dyndiv_data){
561 .shift = 4,
566 .shift = 26,
583 .data = &(struct clk_regmap_mux_data){
586 .shift = 2,
603 .data = &(struct clk_regmap_mux_data){
606 .shift = 16,
617 /* This sub-tree is used a parking clock */
624 .data = &(struct clk_regmap_div_data){
626 .shift = 20,
641 .data = &(struct clk_regmap_mux_data){
644 .shift = 18,
654 /* This sub-tree is used a parking clock */
661 .data = &(struct clk_regmap_mux_data){
664 .shift = 10,
681 .data = &(struct clk_regmap_mux_data){
684 .shift = 11,
703 .data = &(struct clk_regmap_mux_data){
706 .shift = 0,
723 .data = &(struct clk_regmap_mux_data){
726 .shift = 16,
743 .data = &(struct clk_regmap_div_data){
745 .shift = 4,
760 .data = &(struct clk_regmap_mux_data){
763 .shift = 2,
778 .data = &(struct clk_regmap_div_data){
780 .shift = 20,
795 .data = &(struct clk_regmap_mux_data){
798 .shift = 18,
813 .data = &(struct clk_regmap_mux_data){
816 .shift = 10,
831 .data = &(struct clk_regmap_mux_data){
834 .shift = 11,
849 .data = &(struct clk_regmap_mux_data){
852 .shift = 24,
867 .data = &(struct clk_regmap_mux_data){
870 .shift = 25,
885 .data = &(struct clk_regmap_mux_data){
888 .shift = 26,
903 .data = &(struct clk_regmap_mux_data){
906 .shift = 27,
920 unsigned long event, void *data) in g12a_cpu_clk_mux_notifier_cb() argument
945 unsigned long event, void *data) in g12a_cpu_clk_postmux_notifier_cb() argument
956 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
957 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
958 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
959 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
960 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
962 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
963 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
967 clk_hw_set_parent(nb_data->cpu_clk_premux1, in g12a_cpu_clk_postmux_notifier_cb()
968 nb_data->xtal); in g12a_cpu_clk_postmux_notifier_cb()
971 clk_hw_set_parent(nb_data->cpu_clk_postmux1, in g12a_cpu_clk_postmux_notifier_cb()
972 nb_data->cpu_clk_premux1); in g12a_cpu_clk_postmux_notifier_cb()
975 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
976 nb_data->cpu_clk_postmux1); in g12a_cpu_clk_postmux_notifier_cb()
981 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
982 * \- cpu_clk_postmux1 in g12a_cpu_clk_postmux_notifier_cb()
983 * \- cpu_clk_premux1 in g12a_cpu_clk_postmux_notifier_cb()
984 * \- xtal in g12a_cpu_clk_postmux_notifier_cb()
999 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
1000 nb_data->cpu_clk_postmux0); in g12a_cpu_clk_postmux_notifier_cb()
1005 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
1006 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
1007 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
1008 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1009 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1011 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1012 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1048 unsigned long event, void *data) in g12a_sys_pll_notifier_cb() argument
1059 * \- sys_pll in g12a_sys_pll_notifier_cb()
1060 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1064 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1065 nb_data->cpu_clk_dyn); in g12a_sys_pll_notifier_cb()
1070 * \- cpu_clk_dyn in g12a_sys_pll_notifier_cb()
1071 * \- cpu_clk_dynX in g12a_sys_pll_notifier_cb()
1072 * \- cpu_clk_dynX_sel in g12a_sys_pll_notifier_cb()
1073 * \- cpu_clk_dynX_div in g12a_sys_pll_notifier_cb()
1074 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1075 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1089 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1090 nb_data->sys_pll); in g12a_sys_pll_notifier_cb()
1096 * \- sys_pll in g12a_sys_pll_notifier_cb()
1097 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1131 .data = &(struct clk_regmap_gate_data){
1150 .data = &(struct clk_regmap_gate_data){
1195 .data = &(struct clk_regmap_div_data){
1197 .shift = 3,
1210 .data = &(struct clk_regmap_gate_data){
1229 .data = &(struct clk_regmap_div_data){
1231 .shift = 6,
1244 .data = &(struct clk_regmap_gate_data){
1263 .data = &(struct clk_regmap_div_data){
1265 .shift = 9,
1278 .data = &(struct clk_regmap_gate_data){
1297 .data = &(struct clk_regmap_div_data){
1299 .shift = 20,
1315 .index = -1,
1322 .data = &(struct clk_regmap_gate_data){
1433 .data = &(struct clk_regmap_mux_data){
1436 .shift = 3,
1456 .data = &(struct clk_regmap_gate_data){
1476 .data = &(struct clk_regmap_mux_data){
1479 .shift = 6,
1499 .data = &(struct clk_regmap_gate_data){
1519 .data = &(struct clk_regmap_mux_data){
1522 .shift = 9,
1542 .data = &(struct clk_regmap_gate_data){
1562 .data = &(struct clk_regmap_mux_data){
1565 .shift = 20,
1585 .data = &(struct clk_regmap_gate_data){
1622 .data = &(struct meson_clk_pll_data){
1625 .shift = 28,
1630 .shift = 0,
1635 .shift = 10,
1640 .shift = 0,
1645 .shift = 31,
1650 .shift = 29,
1668 .data = &(struct clk_regmap_div_data){
1670 .shift = 16,
1687 .data = &(struct meson_clk_pll_data){
1690 .shift = 28,
1695 .shift = 0,
1700 .shift = 10,
1705 .shift = 0,
1710 .shift = 31,
1715 .shift = 29,
1732 .data = &(struct clk_regmap_div_data){
1734 .shift = 16,
1762 .data = &(struct meson_clk_pll_data){
1765 .shift = 28,
1770 .shift = 0,
1775 .shift = 10,
1780 .shift = 0,
1785 .shift = 31,
1790 .shift = 29,
1809 .data = &(struct clk_regmap_div_data){
1811 .shift = 16,
1854 .data = &(struct meson_clk_pll_data){
1857 .shift = 28,
1862 .shift = 0,
1867 .shift = 10,
1872 .shift = 0,
1877 .shift = 31,
1882 .shift = 29,
1914 .data = &(struct clk_regmap_div_data){
1916 .shift = 16,
1948 .data = &(struct meson_clk_pll_data){
1951 .shift = 28,
1956 .shift = 0,
1961 .shift = 10,
1966 .shift = 0,
1971 .shift = 30,
1976 .shift = 29,
1996 .data = &(struct clk_regmap_div_data){
1998 .shift = 16,
2014 .data = &(struct clk_regmap_div_data){
2016 .shift = 18,
2032 .data = &(struct clk_regmap_div_data){
2034 .shift = 20,
2061 .data = &(struct clk_regmap_gate_data){
2087 .data = &(struct clk_regmap_gate_data){
2113 .data = &(struct clk_regmap_gate_data){
2141 .data = &(struct clk_regmap_gate_data){
2169 .data = &(struct clk_regmap_mux_data){
2172 .shift = 5,
2203 .data = &(struct meson_clk_mpll_data){
2206 .shift = 0,
2211 .shift = 30,
2216 .shift = 20,
2221 .shift = 29,
2239 .data = &(struct clk_regmap_gate_data){
2257 .data = &(struct meson_clk_mpll_data){
2260 .shift = 0,
2265 .shift = 30,
2270 .shift = 20,
2275 .shift = 29,
2293 .data = &(struct clk_regmap_gate_data){
2311 .data = &(struct meson_clk_mpll_data){
2314 .shift = 0,
2319 .shift = 30,
2324 .shift = 20,
2329 .shift = 29,
2347 .data = &(struct clk_regmap_gate_data){
2365 .data = &(struct meson_clk_mpll_data){
2368 .shift = 0,
2373 .shift = 30,
2378 .shift = 20,
2383 .shift = 29,
2401 .data = &(struct clk_regmap_gate_data){
2426 .data = &(struct clk_regmap_mux_data){
2429 .shift = 12,
2441 .data = &(struct clk_regmap_div_data){
2443 .shift = 0,
2458 .data = &(struct clk_regmap_gate_data){
2489 .data = &(struct clk_regmap_mux_data){
2492 .shift = 9,
2504 .data = &(struct clk_regmap_div_data){
2506 .shift = 0,
2521 .data = &(struct clk_regmap_gate_data){
2538 .data = &(struct clk_regmap_mux_data){
2541 .shift = 25,
2553 .data = &(struct clk_regmap_div_data){
2555 .shift = 16,
2570 .data = &(struct clk_regmap_gate_data){
2587 .data = &(struct clk_regmap_mux_data){
2590 .shift = 9,
2602 .data = &(struct clk_regmap_div_data){
2604 .shift = 0,
2619 .data = &(struct clk_regmap_gate_data){
2637 .data = &(struct meson_vid_pll_div_data){
2640 .shift = 0,
2645 .shift = 16,
2664 .data = &(struct clk_regmap_mux_data){
2667 .shift = 18,
2683 .data = &(struct clk_regmap_gate_data){
2712 .data = &(struct clk_regmap_mux_data){
2715 .shift = 9,
2727 .data = &(struct clk_regmap_div_data){
2729 .shift = 0,
2742 .data = &(struct clk_regmap_gate_data){
2756 .data = &(struct clk_regmap_mux_data){
2759 .shift = 25,
2771 .data = &(struct clk_regmap_div_data){
2773 .shift = 16,
2786 .data = &(struct clk_regmap_gate_data){
2800 .data = &(struct clk_regmap_mux_data){
2803 .shift = 31,
2834 .data = &(struct clk_regmap_mux_data){
2837 .shift = 9,
2850 .data = &(struct clk_regmap_div_data){
2852 .shift = 0,
2868 .data = &(struct clk_regmap_gate_data){
2884 .data = &(struct clk_regmap_mux_data){
2887 .shift = 9,
2900 .data = &(struct clk_regmap_div_data){
2902 .shift = 0,
2918 .data = &(struct clk_regmap_gate_data){
2934 .data = &(struct clk_regmap_mux_data){
2937 .shift = 25,
2950 .data = &(struct clk_regmap_div_data){
2952 .shift = 16,
2968 .data = &(struct clk_regmap_gate_data){
2997 .data = &(struct clk_regmap_mux_data){
3000 .shift = 9,
3012 .data = &(struct clk_regmap_div_data){
3014 .shift = 0,
3029 .data = &(struct clk_regmap_gate_data){
3045 .data = &(struct clk_regmap_mux_data){
3048 .shift = 25,
3060 .data = &(struct clk_regmap_div_data){
3062 .shift = 16,
3077 .data = &(struct clk_regmap_gate_data){
3093 .data = &(struct clk_regmap_mux_data){
3096 .shift = 31,
3115 .data = &(struct clk_regmap_gate_data){
3140 .data = &(struct clk_regmap_mux_data){
3143 .shift = 16,
3155 .data = &(struct clk_regmap_mux_data){
3158 .shift = 16,
3170 .data = &(struct clk_regmap_gate_data){
3184 .data = &(struct clk_regmap_gate_data){
3198 .data = &(struct clk_regmap_div_data){
3200 .shift = 0,
3215 .data = &(struct clk_regmap_div_data){
3217 .shift = 0,
3232 .data = &(struct clk_regmap_gate_data){
3246 .data = &(struct clk_regmap_gate_data){
3260 .data = &(struct clk_regmap_gate_data){
3274 .data = &(struct clk_regmap_gate_data){
3288 .data = &(struct clk_regmap_gate_data){
3302 .data = &(struct clk_regmap_gate_data){
3316 .data = &(struct clk_regmap_gate_data){
3330 .data = &(struct clk_regmap_gate_data){
3344 .data = &(struct clk_regmap_gate_data){
3358 .data = &(struct clk_regmap_gate_data){
3372 .data = &(struct clk_regmap_gate_data){
3386 .data = &(struct clk_regmap_gate_data){
3518 .data = &(struct clk_regmap_mux_data){
3521 .shift = 28,
3534 .data = &(struct clk_regmap_mux_data){
3537 .shift = 20,
3550 .data = &(struct clk_regmap_mux_data){
3553 .shift = 28,
3581 .data = &(struct clk_regmap_mux_data){
3584 .shift = 16,
3597 .data = &(struct clk_regmap_gate_data){
3613 .data = &(struct clk_regmap_gate_data){
3629 .data = &(struct clk_regmap_gate_data){
3645 .data = &(struct clk_regmap_gate_data){
3670 .data = &(struct clk_regmap_mux_data){
3673 .shift = 9,
3686 .data = &(struct clk_regmap_div_data){
3688 .shift = 0,
3701 .data = &(struct clk_regmap_gate_data){
3716 * muxed by a glitch-free switch. The CCF can manage this glitch-free
3717 * mux because it does top-to-bottom updates the each clock tree and
3732 .data = &(struct clk_regmap_mux_data){
3735 .shift = 9,
3753 .data = &(struct clk_regmap_div_data){
3755 .shift = 0,
3770 .data = &(struct clk_regmap_gate_data){
3786 .data = &(struct clk_regmap_mux_data){
3789 .shift = 25,
3807 .data = &(struct clk_regmap_div_data){
3809 .shift = 16,
3824 .data = &(struct clk_regmap_gate_data){
3845 .data = &(struct clk_regmap_mux_data){
3848 .shift = 31,
3860 .data = &(struct clk_regmap_div_data){
3862 .shift = 0,
3876 .data = &(struct clk_regmap_gate_data){
3902 .data = &(struct clk_regmap_mux_data){
3905 .shift = 7,
3916 .data = &(struct clk_regmap_div_data){
3918 .shift = 0,
3933 .data = &(struct clk_regmap_gate_data){
3949 .data = &(struct clk_regmap_mux_data){
3952 .shift = 23,
3963 .data = &(struct clk_regmap_div_data){
3965 .shift = 16,
3980 .data = &(struct clk_regmap_gate_data){
4009 .data = &(struct clk_regmap_mux_data){
4012 .shift = 9,
4023 .data = &(struct clk_regmap_div_data){
4025 .shift = 0,
4040 .data = &(struct clk_regmap_gate_data){
4056 .data = &(struct clk_regmap_mux_data){
4059 .shift = 25,
4070 .data = &(struct clk_regmap_div_data){
4072 .shift = 16,
4087 .data = &(struct clk_regmap_gate_data){
5176 dev_err(&pdev->dev, "failed to register the cpu_clk_postmux0 notifier\n"); in meson_g12a_dvfs_setup_common()
5185 dev_err(&pdev->dev, "failed to register the cpu_clk_dyn notifier\n"); in meson_g12a_dvfs_setup_common()
5211 dev_err(&pdev->dev, "failed to register the cpu_clk notifier\n"); in meson_g12b_dvfs_setup()
5221 dev_err(&pdev->dev, "failed to register the sys1_pll notifier\n"); in meson_g12b_dvfs_setup()
5234 dev_err(&pdev->dev, "failed to register the cpub_clk_postmux0 notifier\n"); in meson_g12b_dvfs_setup()
5243 dev_err(&pdev->dev, "failed to register the cpub_clk_dyn notifier\n"); in meson_g12b_dvfs_setup()
5252 dev_err(&pdev->dev, "failed to register the cpub_clk notifier\n"); in meson_g12b_dvfs_setup()
5262 dev_err(&pdev->dev, "failed to register the sys_pll notifier\n"); in meson_g12b_dvfs_setup()
5285 dev_err(&pdev->dev, "failed to register the cpu_clk notifier\n"); in meson_g12a_dvfs_setup()
5294 dev_err(&pdev->dev, "failed to register the sys_pll notifier\n"); in meson_g12a_dvfs_setup()
5312 eeclkc_data = of_device_get_match_data(&pdev->dev); in meson_g12a_probe()
5314 return -EINVAL; in meson_g12a_probe()
5323 if (g12a_data->dvfs_setup) in meson_g12a_probe()
5324 return g12a_data->dvfs_setup(pdev); in meson_g12a_probe()
5360 .compatible = "amlogic,g12a-clkc",
5361 .data = &g12a_clkc_data.eeclkc_data
5364 .compatible = "amlogic,g12b-clkc",
5365 .data = &g12b_clkc_data.eeclkc_data
5368 .compatible = "amlogic,sm1-clkc",
5369 .data = &sm1_clkc_data.eeclkc_data
5377 .name = "g12a-clkc",